David Harris 55b4423329 Added E extension, and downloaded riscv-dv and embench-iot to addins		2022-01-17 14:42:59 +00:00
..
cache	LSU Cleanup	2022-01-15 01:11:17 +00:00
ebu	LSU cleanup	2022-01-15 00:11:30 +00:00
fpu	Reformatted MIT license to 95 characters	2022-01-07 12:58:40 +00:00
generic	Added support for logic memory in the IFU and LSU. This disables the bus interface. Peripherals do not work. Also requires using testbench-harvard.sv. I hope to merge this testbench with the main testbench.sv soon.	2022-01-13 22:21:43 -06:00
hazard	Renamed LSUStall to LSUStallM	2022-01-15 00:24:16 +00:00
ieu	Added E extension, and downloaded riscv-dv and embench-iot to addins	2022-01-17 14:42:59 +00:00
ifu	Fixed spillthreshold warning.	2022-01-14 17:23:39 -06:00
lsu	lsu cleanup down to 346 lines	2022-01-15 01:19:44 +00:00
mmu	Moved Dcache into bus block	2022-01-15 00:39:07 +00:00
muldiv	Better solution to the integer divider interrupt interaction.	2022-01-12 14:22:18 -06:00
privileged	Better solution to the integer divider interrupt interaction.	2022-01-12 14:22:18 -06:00
uncore	Partial local dtim in lsu configuration.	2022-01-13 17:50:31 -06:00
wally	Renamed LSUStall to LSUStallM	2022-01-15 00:24:16 +00:00
sdc	piplined directory cleanup	2022-01-07 12:43:50 +00:00