forked from Github_Repos/cvw
85 lines
3.9 KiB
Systemverilog
85 lines
3.9 KiB
Systemverilog
///////////////////////////////////////////
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// cam_line.sv
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//
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// Written: tfleming@hmc.edu & jtorrey@hmc.edu 6 April 2021
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// Modified: kmacsaigoren@hmc.edu 1 June 2021
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// Implemented SV48 on top of SV39. This included adding SvMode input signal and the wally constants
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// Mostly this was done to make the PageNumberMixer work.
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//
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// Purpose: CAM line for the translation lookaside buffer (TLB)
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// Determines whether a virtual address matches the stored key.
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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// is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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///////////////////////////////////////////
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`include "wally-config.vh"
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module cam_line #(parameter KEY_BITS = 20,
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parameter HIGH_SEGMENT_BITS = 10) (
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input clk, reset,
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// input to check which SvMode is running
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input [`SVMODE_BITS-1:0] SvMode,
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// The requested page number to compare against the key
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input [KEY_BITS-1:0] VirtualPageNumber,
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// Signals to write a new entry to this line
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input CAMLineWrite,
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input [1:0] PageTypeWrite,
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// Flush this line (set valid to 0)
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input TLBFlush,
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// This entry is a key for a tera, giga, mega, or kilopage.
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// PageType == 2'b00 --> kilopage
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// PageType == 2'b01 --> megapage
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// PageType == 2'b10 --> gigapage
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// PageType == 2'b11 --> terapage
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output [1:0] PageType, // *** should this be the stored version or the always updated one?
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output Match
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);
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// This entry has KEY_BITS for the key plus one valid bit.
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logic Valid;
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logic [KEY_BITS-1:0] Key;
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// When determining a match for a superpage, we might use only a portion of
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// the input VirtualPageNumber. Unused parts of the VirtualPageNumber are
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// zeroed in VirtualPageNumberQuery to better match with Key.
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logic [KEY_BITS-1:0] VirtualPageNumberQuery;
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// On a write, update the type of the page referred to by this line.
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flopenr #(2) pagetypeflop(clk, reset, CAMLineWrite, PageTypeWrite, PageType);
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//mux2 #(2) pagetypemux(StoredPageType, PageTypeWrite, CAMLineWrite, PageType);
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// On a write, set the valid bit high and update the stored key.
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// On a flush, zero the valid bit and leave the key unchanged.
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// *** Might we want to update stored key right away to output match on the
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// write cycle? (using a mux)
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flopenrc #(1) validbitflop(clk, reset, TLBFlush, CAMLineWrite, 1'b1, Valid);
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flopenr #(KEY_BITS) keyflop(clk, reset, CAMLineWrite, VirtualPageNumber, Key);
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// Calculate the actual query key based on the input key and the page type.
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// For example, a megapage in SV39 only cares about VPN2 and VPN1, so VPN0
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// should automatically match.
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page_number_mixer #(KEY_BITS, HIGH_SEGMENT_BITS) mixer(VirtualPageNumber, Key, PageType, SvMode, VirtualPageNumberQuery);
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assign Match = ({1'b1, VirtualPageNumberQuery} == {Valid, Key});
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endmodule
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