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cvw/tests/wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/E-slli-01.S

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// -----------
// This file was generated by riscv_ctg (https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg)
// version : 0.5.1
// timestamp : Mon Aug 2 08:58:53 2021 GMT
// usage : riscv_ctg \
// --cgf /home/bilalsakhawat/riscv-ctg/sample_cgfs/dataset.cgf \
// --cgf /home/bilalsakhawat/riscv-ctg/sample_cgfs/rv32e.cgf \
// --base-isa rv32e \
// --randomize
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the slli instruction of the RISC-V E extension for the slli covergroup.
//
#define RVTEST_E
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32E")
.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN
#ifdef TEST_CASE_1
RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*E.*) ;def RVTEST_E = True;def TEST_CASE_1=True;",slli)
RVTEST_SIGBASE( x5,signature_x5_1)
inst_0:
// rs1 != rd, rs1==x2, rd==x10, rs1_val < 0 and imm_val == (xlen-1), rs1_val < 0 and imm_val > 0 and imm_val < xlen
// opcode: slli ; op1:x2; dest:x10; op1val:-0x1; immval:0x1f
TEST_IMM_OP( slli, x10, x2, 0x80000000, -0x1, 0x1f, x5, 0, x12)
inst_1:
// rs1 == rd, rs1==x3, rd==x3, rs1_val == 2147483647, rs1_val == (2**(xlen-1)-1) and imm_val >= 0 and imm_val < xlen, imm_val == 27, rs1_val > 0 and imm_val > 0 and imm_val < xlen
// opcode: slli ; op1:x3; dest:x3; op1val:0x7fffffff; immval:0x1b
TEST_IMM_OP( slli, x3, x3, 0xf8000000, 0x7fffffff, 0x1b, x5, 4, x12)
inst_2:
// rs1==x9, rd==x14, rs1_val == -1073741825,
// opcode: slli ; op1:x9; dest:x14; op1val:-0x40000001; immval:0x7
TEST_IMM_OP( slli, x14, x9, 0xffffff80, -0x40000001, 0x7, x5, 8, x12)
inst_3:
// rs1==x7, rd==x8, rs1_val == -536870913, imm_val == 1
// opcode: slli ; op1:x7; dest:x8; op1val:-0x20000001; immval:0x1
TEST_IMM_OP( slli, x8, x7, 0xbffffffe, -0x20000001, 0x1, x5, 12, x12)
inst_4:
// rs1==x4, rd==x6, rs1_val == -268435457,
// opcode: slli ; op1:x4; dest:x6; op1val:-0x10000001; immval:0x12
TEST_IMM_OP( slli, x6, x4, 0xfffc0000, -0x10000001, 0x12, x5, 16, x12)
inst_5:
// rs1==x11, rd==x7, rs1_val == -134217729, rs1_val < 0 and imm_val == 0
// opcode: slli ; op1:x11; dest:x7; op1val:-0x8000001; immval:0x0
TEST_IMM_OP( slli, x7, x11, 0xf7ffffff, -0x8000001, 0x0, x5, 20, x12)
inst_6:
// rs1==x0, rd==x1, rs1_val == -67108865,
// opcode: slli ; op1:x0; dest:x1; op1val:0x0; immval:0x7
TEST_IMM_OP( slli, x1, x0, 0x0, 0x0, 0x7, x5, 24, x12)
inst_7:
// rs1==x1, rd==x11, rs1_val == -33554433, imm_val == 15
// opcode: slli ; op1:x1; dest:x11; op1val:-0x2000001; immval:0xf
TEST_IMM_OP( slli, x11, x1, 0xffff8000, -0x2000001, 0xf, x5, 28, x3)
inst_8:
// rs1==x10, rd==x12, rs1_val == -16777217,
// opcode: slli ; op1:x10; dest:x12; op1val:-0x1000001; immval:0x13
TEST_IMM_OP( slli, x12, x10, 0xfff80000, -0x1000001, 0x13, x5, 32, x3)
RVTEST_SIGBASE( x1,signature_x1_0)
inst_9:
// rs1==x13, rd==x9, rs1_val == -8388609, imm_val == 16
// opcode: slli ; op1:x13; dest:x9; op1val:-0x800001; immval:0x10
TEST_IMM_OP( slli, x9, x13, 0xffff0000, -0x800001, 0x10, x1, 0, x3)
inst_10:
// rs1==x5, rd==x13, rs1_val == -4194305,
// opcode: slli ; op1:x5; dest:x13; op1val:-0x400001; immval:0x1f
TEST_IMM_OP( slli, x13, x5, 0x80000000, -0x400001, 0x1f, x1, 4, x3)
inst_11:
// rs1==x8, rd==x15, rs1_val == -2097153,
// opcode: slli ; op1:x8; dest:x15; op1val:-0x200001; immval:0x1b
TEST_IMM_OP( slli, x15, x8, 0xf8000000, -0x200001, 0x1b, x1, 8, x3)
inst_12:
// rs1==x15, rd==x4, rs1_val == -1048577,
// opcode: slli ; op1:x15; dest:x4; op1val:-0x100001; immval:0xc
TEST_IMM_OP( slli, x4, x15, 0xfffff000, -0x100001, 0xc, x1, 12, x3)
inst_13:
// rs1==x14, rd==x5, rs1_val == -524289,
// opcode: slli ; op1:x14; dest:x5; op1val:-0x80001; immval:0x9
TEST_IMM_OP( slli, x5, x14, 0xeffffe00, -0x80001, 0x9, x1, 16, x3)
inst_14:
// rs1==x6, rd==x2, rs1_val == -262145,
// opcode: slli ; op1:x6; dest:x2; op1val:-0x40001; immval:0x0
TEST_IMM_OP( slli, x2, x6, 0xfffbffff, -0x40001, 0x0, x1, 20, x3)
inst_15:
// rs1==x12, rd==x0, rs1_val == -131073,
// opcode: slli ; op1:x12; dest:x0; op1val:-0x20001; immval:0x10
TEST_IMM_OP( slli, x0, x12, 0, -0x20001, 0x10, x1, 24, x2)
inst_16:
// rs1_val == -65537,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x10001; immval:0xb
TEST_IMM_OP( slli, x11, x10, 0xf7fff800, -0x10001, 0xb, x1, 28, x2)
RVTEST_SIGBASE( x1,signature_x1_1)
inst_17:
// rs1_val == -32769,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x8001; immval:0x11
TEST_IMM_OP( slli, x11, x10, 0xfffe0000, -0x8001, 0x11, x1, 0, x2)
inst_18:
// rs1_val == -16385,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x4001; immval:0x1b
TEST_IMM_OP( slli, x11, x10, 0xf8000000, -0x4001, 0x1b, x1, 4, x2)
inst_19:
// rs1_val == -8193,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x2001; immval:0x11
TEST_IMM_OP( slli, x11, x10, 0xbffe0000, -0x2001, 0x11, x1, 8, x2)
inst_20:
// rs1_val == -4097, imm_val == 29
// opcode: slli ; op1:x10; dest:x11; op1val:-0x1001; immval:0x1d
TEST_IMM_OP( slli, x11, x10, 0xe0000000, -0x1001, 0x1d, x1, 12, x2)
inst_21:
// rs1_val == -2049,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x801; immval:0xe
TEST_IMM_OP( slli, x11, x10, 0xfdffc000, -0x801, 0xe, x1, 16, x2)
inst_22:
// rs1_val == -1025, imm_val == 23
// opcode: slli ; op1:x10; dest:x11; op1val:-0x401; immval:0x17
TEST_IMM_OP( slli, x11, x10, 0xff800000, -0x401, 0x17, x1, 20, x2)
inst_23:
// rs1_val == -513,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x201; immval:0xe
TEST_IMM_OP( slli, x11, x10, 0xff7fc000, -0x201, 0xe, x1, 24, x2)
inst_24:
// rs1_val == -257,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x101; immval:0x11
TEST_IMM_OP( slli, x11, x10, 0xfdfe0000, -0x101, 0x11, x1, 28, x2)
inst_25:
// rs1_val == -129,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x81; immval:0xe
TEST_IMM_OP( slli, x11, x10, 0xffdfc000, -0x81, 0xe, x1, 32, x2)
inst_26:
// rs1_val == -65,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x41; immval:0xe
TEST_IMM_OP( slli, x11, x10, 0xffefc000, -0x41, 0xe, x1, 36, x2)
inst_27:
// rs1_val == -33, imm_val == 8
// opcode: slli ; op1:x10; dest:x11; op1val:-0x21; immval:0x8
TEST_IMM_OP( slli, x11, x10, 0xffffdf00, -0x21, 0x8, x1, 40, x2)
inst_28:
// rs1_val == -17,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x11; immval:0x6
TEST_IMM_OP( slli, x11, x10, 0xfffffbc0, -0x11, 0x6, x1, 44, x2)
inst_29:
// rs1_val == -9, imm_val == 4
// opcode: slli ; op1:x10; dest:x11; op1val:-0x9; immval:0x4
TEST_IMM_OP( slli, x11, x10, 0xffffff70, -0x9, 0x4, x1, 48, x2)
inst_30:
// rs1_val == -5,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x5; immval:0x10
TEST_IMM_OP( slli, x11, x10, 0xfffb0000, -0x5, 0x10, x1, 52, x2)
inst_31:
// rs1_val == -3,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x3; immval:0x9
TEST_IMM_OP( slli, x11, x10, 0xfffffa00, -0x3, 0x9, x1, 56, x2)
inst_32:
// rs1_val == -2,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x2; immval:0x7
TEST_IMM_OP( slli, x11, x10, 0xffffff00, -0x2, 0x7, x1, 60, x2)
inst_33:
// imm_val == 30, rs1_val == 0 and imm_val >= 0 and imm_val < xlen, rs1_val==0
// opcode: slli ; op1:x10; dest:x11; op1val:0x0; immval:0x1e
TEST_IMM_OP( slli, x11, x10, 0x0, 0x0, 0x1e, x1, 64, x2)
inst_34:
// rs1_val == -2147483648, rs1_val == (-2**(xlen-1)) and imm_val >= 0 and imm_val < xlen
// opcode: slli ; op1:x10; dest:x11; op1val:-0x80000000; immval:0x17
TEST_IMM_OP( slli, x11, x10, 0x0, -0x80000000, 0x17, x1, 68, x2)
inst_35:
// rs1_val == 1073741824, imm_val == 21
// opcode: slli ; op1:x10; dest:x11; op1val:0x40000000; immval:0x15
TEST_IMM_OP( slli, x11, x10, 0x0, 0x40000000, 0x15, x1, 72, x2)
inst_36:
// rs1_val == 536870912,
// opcode: slli ; op1:x10; dest:x11; op1val:0x20000000; immval:0x10
TEST_IMM_OP( slli, x11, x10, 0x0, 0x20000000, 0x10, x1, 76, x2)
inst_37:
// rs1_val == 268435456,
// opcode: slli ; op1:x10; dest:x11; op1val:0x10000000; immval:0x7
TEST_IMM_OP( slli, x11, x10, 0x0, 0x10000000, 0x7, x1, 80, x2)
inst_38:
// rs1_val == 134217728,
// opcode: slli ; op1:x10; dest:x11; op1val:0x8000000; immval:0x1e
TEST_IMM_OP( slli, x11, x10, 0x0, 0x8000000, 0x1e, x1, 84, x2)
inst_39:
// rs1_val == 67108864,
// opcode: slli ; op1:x10; dest:x11; op1val:0x4000000; immval:0xf
TEST_IMM_OP( slli, x11, x10, 0x0, 0x4000000, 0xf, x1, 88, x2)
inst_40:
// rs1_val == 33554432,
// opcode: slli ; op1:x10; dest:x11; op1val:0x2000000; immval:0x1e
TEST_IMM_OP( slli, x11, x10, 0x0, 0x2000000, 0x1e, x1, 92, x2)
inst_41:
// rs1_val == 16777216, rs1_val > 0 and imm_val == (xlen-1)
// opcode: slli ; op1:x10; dest:x11; op1val:0x1000000; immval:0x1f
TEST_IMM_OP( slli, x11, x10, 0x0, 0x1000000, 0x1f, x1, 96, x2)
inst_42:
// rs1_val == 8388608,
// opcode: slli ; op1:x10; dest:x11; op1val:0x800000; immval:0x15
TEST_IMM_OP( slli, x11, x10, 0x0, 0x800000, 0x15, x1, 100, x2)
inst_43:
// rs1_val == 4194304, rs1_val > 0 and imm_val == 0
// opcode: slli ; op1:x10; dest:x11; op1val:0x400000; immval:0x0
TEST_IMM_OP( slli, x11, x10, 0x400000, 0x400000, 0x0, x1, 104, x2)
inst_44:
// rs1_val == 2097152,
// opcode: slli ; op1:x10; dest:x11; op1val:0x200000; immval:0x6
TEST_IMM_OP( slli, x11, x10, 0x8000000, 0x200000, 0x6, x1, 108, x2)
inst_45:
// rs1_val == 1048576,
// opcode: slli ; op1:x10; dest:x11; op1val:0x100000; immval:0x11
TEST_IMM_OP( slli, x11, x10, 0x0, 0x100000, 0x11, x1, 112, x2)
inst_46:
// rs1_val == 524288,
// opcode: slli ; op1:x10; dest:x11; op1val:0x80000; immval:0x1e
TEST_IMM_OP( slli, x11, x10, 0x0, 0x80000, 0x1e, x1, 116, x2)
inst_47:
// rs1_val == 262144,
// opcode: slli ; op1:x10; dest:x11; op1val:0x40000; immval:0x13
TEST_IMM_OP( slli, x11, x10, 0x0, 0x40000, 0x13, x1, 120, x2)
inst_48:
// rs1_val == 131072,
// opcode: slli ; op1:x10; dest:x11; op1val:0x20000; immval:0xf
TEST_IMM_OP( slli, x11, x10, 0x0, 0x20000, 0xf, x1, 124, x2)
inst_49:
// rs1_val == 65536,
// opcode: slli ; op1:x10; dest:x11; op1val:0x10000; immval:0xe
TEST_IMM_OP( slli, x11, x10, 0x40000000, 0x10000, 0xe, x1, 128, x2)
inst_50:
// rs1_val == 32768,
// opcode: slli ; op1:x10; dest:x11; op1val:0x8000; immval:0xc
TEST_IMM_OP( slli, x11, x10, 0x8000000, 0x8000, 0xc, x1, 132, x2)
inst_51:
// rs1_val == 16384,
// opcode: slli ; op1:x10; dest:x11; op1val:0x4000; immval:0x0
TEST_IMM_OP( slli, x11, x10, 0x4000, 0x4000, 0x0, x1, 136, x2)
inst_52:
// rs1_val == 8192,
// opcode: slli ; op1:x10; dest:x11; op1val:0x2000; immval:0x0
TEST_IMM_OP( slli, x11, x10, 0x2000, 0x2000, 0x0, x1, 140, x2)
inst_53:
// rs1_val == 4096,
// opcode: slli ; op1:x10; dest:x11; op1val:0x1000; immval:0x1
TEST_IMM_OP( slli, x11, x10, 0x2000, 0x1000, 0x1, x1, 144, x2)
inst_54:
// rs1_val == 2048,
// opcode: slli ; op1:x10; dest:x11; op1val:0x800; immval:0x15
TEST_IMM_OP( slli, x11, x10, 0x0, 0x800, 0x15, x1, 148, x2)
inst_55:
// rs1_val == 1024,
// opcode: slli ; op1:x10; dest:x11; op1val:0x400; immval:0xc
TEST_IMM_OP( slli, x11, x10, 0x400000, 0x400, 0xc, x1, 152, x2)
inst_56:
// rs1_val == 512,
// opcode: slli ; op1:x10; dest:x11; op1val:0x200; immval:0x3
TEST_IMM_OP( slli, x11, x10, 0x1000, 0x200, 0x3, x1, 156, x2)
inst_57:
// rs1_val == 256,
// opcode: slli ; op1:x10; dest:x11; op1val:0x100; immval:0x15
TEST_IMM_OP( slli, x11, x10, 0x20000000, 0x100, 0x15, x1, 160, x2)
inst_58:
// rs1_val == 128,
// opcode: slli ; op1:x10; dest:x11; op1val:0x80; immval:0x1d
TEST_IMM_OP( slli, x11, x10, 0x0, 0x80, 0x1d, x1, 164, x2)
inst_59:
// rs1_val == 64,
// opcode: slli ; op1:x10; dest:x11; op1val:0x40; immval:0x6
TEST_IMM_OP( slli, x11, x10, 0x1000, 0x40, 0x6, x1, 168, x2)
inst_60:
// rs1_val == 32,
// opcode: slli ; op1:x10; dest:x11; op1val:0x20; immval:0xb
TEST_IMM_OP( slli, x11, x10, 0x10000, 0x20, 0xb, x1, 172, x2)
inst_61:
// rs1_val == 16,
// opcode: slli ; op1:x10; dest:x11; op1val:0x10; immval:0x0
TEST_IMM_OP( slli, x11, x10, 0x10, 0x10, 0x0, x1, 176, x2)
inst_62:
// rs1_val == 8,
// opcode: slli ; op1:x10; dest:x11; op1val:0x8; immval:0x13
TEST_IMM_OP( slli, x11, x10, 0x400000, 0x8, 0x13, x1, 180, x2)
inst_63:
// rs1_val == 4, rs1_val==4, rs1_val == imm_val and imm_val > 0 and imm_val < xlen
// opcode: slli ; op1:x10; dest:x11; op1val:0x4; immval:0x4
TEST_IMM_OP( slli, x11, x10, 0x40, 0x4, 0x4, x1, 184, x2)
inst_64:
// rs1_val == 2, rs1_val==2
// opcode: slli ; op1:x10; dest:x11; op1val:0x2; immval:0xb
TEST_IMM_OP( slli, x11, x10, 0x1000, 0x2, 0xb, x1, 188, x2)
inst_65:
// rs1_val == 1, rs1_val == 1 and imm_val >= 0 and imm_val < xlen
// opcode: slli ; op1:x10; dest:x11; op1val:0x1; immval:0xe
TEST_IMM_OP( slli, x11, x10, 0x4000, 0x1, 0xe, x1, 192, x2)
inst_66:
// imm_val == 2,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x81; immval:0x2
TEST_IMM_OP( slli, x11, x10, 0xfffffdfc, -0x81, 0x2, x1, 196, x2)
inst_67:
// rs1_val==46341,
// opcode: slli ; op1:x10; dest:x11; op1val:0xb505; immval:0xf
TEST_IMM_OP( slli, x11, x10, 0x5a828000, 0xb505, 0xf, x1, 200, x2)
inst_68:
// rs1_val==-46339,
// opcode: slli ; op1:x10; dest:x11; op1val:-0xb503; immval:0x17
TEST_IMM_OP( slli, x11, x10, 0x7e800000, -0xb503, 0x17, x1, 204, x2)
inst_69:
// rs1_val==1717986919,
// opcode: slli ; op1:x10; dest:x11; op1val:0x66666667; immval:0x1b
TEST_IMM_OP( slli, x11, x10, 0x38000000, 0x66666667, 0x1b, x1, 208, x2)
inst_70:
// rs1_val==858993460,
// opcode: slli ; op1:x10; dest:x11; op1val:0x33333334; immval:0x13
TEST_IMM_OP( slli, x11, x10, 0x99a00000, 0x33333334, 0x13, x1, 212, x2)
inst_71:
// rs1_val==6,
// opcode: slli ; op1:x10; dest:x11; op1val:0x6; immval:0xb
TEST_IMM_OP( slli, x11, x10, 0x3000, 0x6, 0xb, x1, 216, x2)
inst_72:
// rs1_val==-1431655765,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x55555555; immval:0x12
TEST_IMM_OP( slli, x11, x10, 0xaaac0000, -0x55555555, 0x12, x1, 220, x2)
inst_73:
// rs1_val==1431655766,
// opcode: slli ; op1:x10; dest:x11; op1val:0x55555556; immval:0x1e
TEST_IMM_OP( slli, x11, x10, 0x80000000, 0x55555556, 0x1e, x1, 224, x2)
inst_74:
// rs1_val==3,
// opcode: slli ; op1:x10; dest:x11; op1val:0x3; immval:0x12
TEST_IMM_OP( slli, x11, x10, 0xc0000, 0x3, 0x12, x1, 228, x2)
inst_75:
// rs1_val == -1431655766, rs1_val==-1431655766
// opcode: slli ; op1:x10; dest:x11; op1val:-0x55555556; immval:0x10
TEST_IMM_OP( slli, x11, x10, 0xaaaa0000, -0x55555556, 0x10, x1, 232, x2)
inst_76:
// rs1_val == 1431655765, rs1_val==1431655765
// opcode: slli ; op1:x10; dest:x11; op1val:0x55555555; immval:0x7
TEST_IMM_OP( slli, x11, x10, 0xaaaaaa80, 0x55555555, 0x7, x1, 236, x2)
inst_77:
// imm_val == 10,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x1001; immval:0xa
TEST_IMM_OP( slli, x11, x10, 0xffbffc00, -0x1001, 0xa, x1, 240, x2)
inst_78:
// rs1_val==46339,
// opcode: slli ; op1:x10; dest:x11; op1val:0xb503; immval:0x6
TEST_IMM_OP( slli, x11, x10, 0x2d40c0, 0xb503, 0x6, x1, 244, x2)
inst_79:
// rs1_val==1717986917,
// opcode: slli ; op1:x10; dest:x11; op1val:0x66666665; immval:0xd
TEST_IMM_OP( slli, x11, x10, 0xcccca000, 0x66666665, 0xd, x1, 248, x2)
inst_80:
// rs1_val==858993458,
// opcode: slli ; op1:x10; dest:x11; op1val:0x33333332; immval:0x1
TEST_IMM_OP( slli, x11, x10, 0x66666664, 0x33333332, 0x1, x1, 252, x2)
inst_81:
// rs1_val==1431655764,
// opcode: slli ; op1:x10; dest:x11; op1val:0x55555554; immval:0x1d
TEST_IMM_OP( slli, x11, x10, 0x80000000, 0x55555554, 0x1d, x1, 256, x2)
inst_82:
// rs1_val==46340,
// opcode: slli ; op1:x10; dest:x11; op1val:0xb504; immval:0x11
TEST_IMM_OP( slli, x11, x10, 0x6a080000, 0xb504, 0x11, x1, 260, x2)
inst_83:
// rs1_val==-46340,
// opcode: slli ; op1:x10; dest:x11; op1val:-0xb504; immval:0x13
TEST_IMM_OP( slli, x11, x10, 0x57e00000, -0xb504, 0x13, x1, 264, x2)
inst_84:
// rs1_val==1717986918,
// opcode: slli ; op1:x10; dest:x11; op1val:0x66666666; immval:0x1d
TEST_IMM_OP( slli, x11, x10, 0xc0000000, 0x66666666, 0x1d, x1, 268, x2)
inst_85:
// rs1_val==858993459,
// opcode: slli ; op1:x10; dest:x11; op1val:0x33333333; immval:0xa
TEST_IMM_OP( slli, x11, x10, 0xcccccc00, 0x33333333, 0xa, x1, 272, x2)
inst_86:
// rs1_val==5,
// opcode: slli ; op1:x10; dest:x11; op1val:0x5; immval:0x1b
TEST_IMM_OP( slli, x11, x10, 0x28000000, 0x5, 0x1b, x1, 276, x2)
inst_87:
// rs1_val == -67108865,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x4000001; immval:0x7
TEST_IMM_OP( slli, x11, x10, 0xffffff80, -0x4000001, 0x7, x1, 280, x2)
inst_88:
// rs1_val == -131073,
// opcode: slli ; op1:x10; dest:x11; op1val:-0x20001; immval:0x10
TEST_IMM_OP( slli, x11, x10, 0xffff0000, -0x20001, 0x10, x1, 284, x2)
#endif
RVTEST_CODE_END
RVMODEL_HALT
RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
RVTEST_DATA_END
RVMODEL_DATA_BEGIN
signature_x5_0:
.fill 0*(XLEN/32),4,0xdeadbeef
signature_x5_1:
.fill 9*(XLEN/32),4,0xdeadbeef
signature_x1_0:
.fill 8*(XLEN/32),4,0xdeadbeef
signature_x1_1:
.fill 72*(XLEN/32),4,0xdeadbeef
#ifdef rvtest_mtrap_routine
mtrap_sigptr:
.fill 64*(XLEN/32),4,0xdeadbeef
#endif
#ifdef rvtest_gpr_save
gpr_save:
.fill 32*(XLEN/32),4,0xdeadbeef
#endif
RVMODEL_DATA_END
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