forked from Github_Repos/cvw
43 lines
945 B
Plaintext
43 lines
945 B
Plaintext
#--showoverrides
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#--help --helpall
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--traceregs
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--override cpu/show_c_prefix=T
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--override cpu/unaligned=F
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--override cpu/ignore_non_leaf_DAU=1
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# Enable the Imperas instruction coverage
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#-extlib refRoot/cpu/cv=imperas.com/intercept/riscvInstructionCoverage/1.0
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#-override refRoot/cpu/cv/cover=basic
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#-override refRoot/cpu/cv/extensions=RV32I
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# Add Imperas simulator application instruction tracing
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--trace
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--tracechange
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--traceshowicount
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--tracemode
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--tracemem ASX
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--monitornetschange
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# Exceptions and pagetables debug
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--override cpu/debugflags=6
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# Turn on verbose output for Imperas simulator
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--verbose
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# Turn on verbose output for RISCV model
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--override cpu/verbose=1
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# Store simulator output to logfile
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--output imperas.log
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--override cpu/PMP_registers=0
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#--showoverrides
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#--mpdconsole
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# ignore settings of bits DAU for non leaf page table walks
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--override cpu/ignore_non_leaf_DAU=1
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# mimpid = 0x100
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--override cpu/mimpid=0x100
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