forked from Github_Repos/cvw
145 lines
6.4 KiB
Plaintext
145 lines
6.4 KiB
Plaintext
# linux-waves.do
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view wave
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add wave -divider
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add wave /testbench/clk
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add wave /testbench/reset
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add wave -dec /testbench/instrs
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add wave -divider Stalls_and_Flushes
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add wave /testbench/dut/hart/StallF
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add wave /testbench/dut/hart/StallD
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add wave /testbench/dut/hart/StallE
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add wave /testbench/dut/hart/StallM
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add wave /testbench/dut/hart/StallW
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add wave /testbench/dut/hart/FlushD
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add wave /testbench/dut/hart/FlushE
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add wave /testbench/dut/hart/FlushM
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add wave /testbench/dut/hart/FlushW
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add wave -divider F
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add wave -hex /testbench/dut/hart/ifu/PCF
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add wave -divider D
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add wave -hex /testbench/PCDexpected
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add wave -hex /testbench/dut/hart/ifu/PCD
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add wave -hex /testbench/PCtextD
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add wave /testbench/InstrDName
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add wave -hex /testbench/dut/hart/ifu/InstrD
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add wave -hex /testbench/dut/hart/ieu/c/InstrValidD
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add wave -hex /testbench/PCDwrong
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add wave -divider E
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add wave -hex /testbench/dut/hart/ifu/PCE
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add wave -hex /testbench/PCtextE
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add wave /testbench/InstrEName
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add wave -hex /testbench/dut/hart/ifu/InstrE
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add wave -hex /testbench/dut/hart/ieu/c/InstrValidE
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add wave -hex /testbench/dut/hart/ieu/dp/SrcAE
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add wave -hex /testbench/dut/hart/ieu/dp/SrcBE
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add wave -hex /testbench/dut/hart/ieu/dp/ALUResultE
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add wave -divider M
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add wave -hex /testbench/dut/hart/ifu/PCM
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add wave -hex /testbench/PCtextM
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add wave /testbench/InstrMName
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add wave -hex /testbench/dut/hart/ifu/InstrM
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add wave -hex /testbench/dut/hart/ieu/c/InstrValidM
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add wave /testbench/dut/uncore/dtim/memwrite
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add wave -hex /testbench/dut/uncore/HADDR
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add wave -hex /testbench/HWRITE
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add wave -hex /testbench/dut/uncore/HWDATA
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add wave -hex /testbench/HRDATA
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add wave -hex /testbench/readAdrExpected
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add wave -divider W
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add wave -hex /testbench/PCW
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add wave -hex /testbench/PCtextW
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add wave -hex /testbench/dut/hart/ieu/c/InstrValidW
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add wave /testbench/dut/hart/ieu/dp/RegWriteW
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add wave -hex /testbench/dut/hart/ieu/dp/ResultW
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add wave -hex /testbench/dut/hart/ieu/dp/RdW
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add wave -divider RegFile
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add wave -hex /testbench/regExpected
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add wave -hex /testbench/regNumExpected
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[1]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[2]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[3]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[4]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[5]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[6]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[7]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[8]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[9]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[10]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[11]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[12]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[13]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[14]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[15]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[16]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[17]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[18]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[19]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[20]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[21]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[22]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[23]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[24]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[25]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[26]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[27]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[28]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[29]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[30]
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add wave -hex /testbench/dut/hart/ieu/dp/regf/rf[31]
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add wave -divider CSRs
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add wave -hex sim:/testbench/dut/hart/priv/csr/MSTATUS_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/MCOUNTINHIBIT_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/MCOUNTEREN_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csri/MIDELEG_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csri/MIP_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csri/MIE_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrm/MEPC_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrm/MTVEC_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTEREN_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrm/MCOUNTINHIBIT_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrm/MEDELEG_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrm/MIDELEG_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrm/MSCRATCH_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrm/MCAUSE_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrm/MTVAL_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/SSTATUS_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/SCOUNTEREN_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csri/SIP_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csri/SIE_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrs/SEPC_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrs/STVEC_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrs/SCOUNTEREN_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrs/SEDELEG_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrs/SIDELEG_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrs/SATP_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/USTATUS_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrn/UEPC_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrn/UTVEC_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrn/UIP_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrn/UIE_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrm/PMPCFG_ARRAY_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrm/PMPADDR_ARRAY_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csrm/MISA_REGW
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add wave -hex sim:/testbench/dut/hart/priv/csr/genblk1/csru/FRM_REGW
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add wave -divider
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add wave -hex -r /testbench/*
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# appearance
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TreeUpdate [SetDefaultTree]
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WaveRestoreZoom {0 ps} {100 ps}
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configure wave -namecolwidth 250
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configure wave -valuecolwidth 150
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configure wave -justifyvalue left
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configure wave -signalnamewidth 0
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configure wave -snapdistance 10
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configure wave -datasetprefix 0
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configure wave -rowmargin 4
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configure wave -childrowmargin 2
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set DefaultRadix hexadecimal
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