David Harris 39d5570d2c Added riscvsingle. Removed unnecessary coremark config. Added compiler flags for Coremark.		2022-01-10 05:04:13 +00:00
..
config	Added riscvsingle. Removed unnecessary coremark config. Added compiler flags for Coremark.	2022-01-10 05:04:13 +00:00
fpu-testfloat/FMA/tbgen	Removed more generate statements	2022-01-05 16:25:08 +00:00
misc	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00
regression	Added riscvsingle. Removed unnecessary coremark config. Added compiler flags for Coremark.	2022-01-10 05:04:13 +00:00
src	Fixed bug with interlock fsm. The interlock fsm should suppress bus and cache requests by the cpu	2022-01-07 17:55:34 -06:00
srt	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00
testbench	Added riscvsingle. Removed unnecessary coremark config. Added compiler flags for Coremark.	2022-01-10 05:04:13 +00:00