Jarred Allen 36452749d7 Merge remote-tracking branch 'origin/main' into cache		2021-03-15 19:08:25 -04:00
..
regression-wally.py	Oups. I forgot to update other do files with the commands to preload the branch predictor memories.	2021-03-05 15:23:53 -06:00
sim-busybear	busybear: add sim-busybear and sim-busybear-batch based on sim-wally	2021-03-01 21:01:15 +00:00
sim-busybear-batch	busybear: make a second .do file with better optimization for command line mode	2021-03-08 19:35:00 +00:00
sim-wally	Added test configurations	2021-01-25 11:28:43 -05:00
sim-wally-batch	Added test configurations	2021-01-25 11:28:43 -05:00
sim-wally-rv32ic	add rv32ic regression test	2021-03-11 12:40:29 -05:00
wally-busybear-batch.do	Converted branch predictor preloads to use system verilog rather than modelsim's load command.	2021-03-15 12:39:44 -05:00
wally-busybear.do	Converted branch predictor preloads to use system verilog rather than modelsim's load command.	2021-03-15 12:39:44 -05:00
wally-coremark.do	Converted branch predictor preloads to use system verilog rather than modelsim's load command.	2021-03-15 12:39:44 -05:00
wally-peripherals-signals.do	refactored sim file	2021-03-05 14:25:16 -05:00
wally-peripherals.do	Converted branch predictor preloads to use system verilog rather than modelsim's load command.	2021-03-15 12:39:44 -05:00
wally-pipelined-batch-parallel.do	Converted branch predictor preloads to use system verilog rather than modelsim's load command.	2021-03-15 12:39:44 -05:00
wally-pipelined-batch.do	Converted branch predictor preloads to use system verilog rather than modelsim's load command.	2021-03-15 12:39:44 -05:00
wally-pipelined-ross.do	Converted branch predictor preloads to use system verilog rather than modelsim's load command.	2021-03-15 12:39:44 -05:00
wally-pipelined.do	Merge remote-tracking branch 'origin/main' into cache	2021-03-15 19:08:25 -04:00
wave-all.do	Added FlushF to hazard unit.	2021-02-19 16:36:51 -06:00
wave.do	Cleanup of the branch predictor flush and stall controls.	2021-03-12 14:57:53 -06:00