cvw/pipelined/config
2022-02-22 03:46:08 +00:00
..
buildroot change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests 2022-02-22 03:46:08 +00:00
fpga change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests 2022-02-22 03:46:08 +00:00
rv32e change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests 2022-02-22 03:46:08 +00:00
rv32gc change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests 2022-02-22 03:46:08 +00:00
rv32ic change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests 2022-02-22 03:46:08 +00:00
rv64BP change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests 2022-02-22 03:46:08 +00:00
rv64gc change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests 2022-02-22 03:46:08 +00:00
rv64ic change UART PLIC IRQ mapping from 4 to 10 to match virt model; move WALLY-PERIPH tests to wally arch tests 2022-02-22 03:46:08 +00:00
shared changed DMEM and IMEM configurations to support BUS/TIM/CACHE 2022-02-03 00:41:09 +00:00