cvw/benchmarks/riscv-coremark
2021-12-19 20:31:55 -06:00
..
coremark Coremark updates 2021-11-30 11:16:13 -08:00
old
riscv64-baremetal Performance counters now output of coremark. 2021-12-09 14:48:17 -06:00
.gitignore
.gitmodules
LICENSE
Makefile Updated coremark testbench with the extra ports from FPGA merge. 2021-12-08 13:40:32 -06:00
multilib.txt Added file showing how to compile riscv toolchain for different extension combinations. 2021-12-19 20:31:55 -06:00