slmnemo 79c28d34dc Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main		2022-05-19 17:51:45 -07:00
..
common	Added WFI to the testbench instruction name decoder	2022-04-14 17:12:11 +00:00
fp	generating all testfloat vectors	2022-04-04 17:17:12 +00:00
sdc
testbench-coremark_bare.sv
testbench-f64.sv	Renamed unpacking unit to unpack and renamed WriteDataW to ResultW in IEU datapath	2022-02-28 20:50:51 +00:00
testbench-fp.sv	Bug fixed in unpacker and sub/add/mul tests pass TestFloat	2022-05-19 20:31:23 +00:00
testbench-fpga.sv	Updated the fpga test bench.	2022-04-01 17:14:47 -05:00
testbench-linux.sv	Fixed buildroot by adding a second .	2022-05-19 17:49:32 -07:00
testbench.sv	Updated testbench to initialize using force and releases storing zero in all memory locations in branch predictor. Fixed arch64i bug related to failing bge due to an incorrect signature.	2022-05-17 01:04:13 +00:00
testbench.sv.bak	filled in ppa.sv, madzscript.py now synthesizes in parallel in puts results in csv	2022-05-12 07:22:06 +00:00
tests-fp.vh	Added fp tests - doesnpass yet	2022-05-19 16:32:30 +00:00
tests.vh	quit	2022-05-17 01:03:09 +00:00