forked from Github_Repos/cvw
293 lines
9.9 KiB
Python
293 lines
9.9 KiB
Python
#!/usr/bin/python3
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##################################
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# virtual_memory_util.py
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#
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# Jessica Torrey <jtorrey@hmc.edu> 01 March 2021
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# Thomas Fleming <tfleming@hmc.edu> 01 March 2021
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#
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# Modified kmacsaigoren@hmc.edu 2 June 2021
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# file now reflects actual use to generate assembly code pagetable.
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# file now also includes small guide on how it can be used.
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#
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# Utility for generating the pagetable for any test assembly code where virtual memory is needed.
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##################################
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######################################################
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""" HOW TO USE THIS FILE
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This is all assuming you are writing code very similar to the WALLY-VIRTUALMEMORY tests and would like your own virtual memory map.
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This guide is also stored in the WALLY-VIRTUALMEMORY.S file as well.
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Begin by copying an existing page directory over to your test and running make (it'll be wrong, but we'll fix it in a second).
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Make may hang or give you an error because the reference outputs may be wrong, but all we're trying to do is get an elf file.
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Simulate the test code on your favorite riscv processor simulator with a debugger that will show you internal state/register values.
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I used OVPsimPlus with the command 'riscvOVPsimPlus.exe --variant <Variant name, ex: RV64I> --program <path to elf file> --gdbconsole'
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Run through the simulation until it has written to satp and read the bottom 60 bits of it.
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Assuming you're a test with the same setup code, this should be the value of the base ppn.
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Near the top of the python file you're reading right now, edit the value of 'INITIAL_PPN' to be the base PPN you just found in hex.
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Now find the mappings at the very bottom of the python file.
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Each of these loops is adding a mapping from each virtual page in the loop to a physical page somewhere in RAM.
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add or remove mappings as you see fit. the first loop maps VPNs of 0x80000 to 0x80014 onto PPNs of 0x80000 to 0x80014
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you can map single pages or ranges of pages. you can also map multiple VPNs onto the same PPN.
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Make sure NOT to include the final VPN that causes the page fault in your test or your program will hang on the j loop instruction (unless you change the end condition).
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double check that you're using the right architecture/svmode in the 'arch' variable
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then run this python file and paste its output at the bottom of your assembly code. Be sure not to delete the signature fills.
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email kmacsaigoren@hmc.edu if you have any questions and he might be able to remember the answers.
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*** Currently doesn't work: mapping something with nonzeros in the VPN[3] feild onto any physical aderss.
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It'll produce a page table, but writing to those virtual adresses will not correspond to the correctly mapped physical adresses.
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additionally, the expected behaviour doesn't really work when we try to map to a ram afress that starts with something larger than 000000008
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This could be ebcause of the 32 bit adress space for physical memory.
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remember that these things are broken with this program that generates page tables for test code. it does not say whether the test or module
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itself works or not.
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*/
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"""
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######################################################
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##################################
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# libraries
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##################################
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from datetime import datetime
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from random import randint, seed, getrandbits
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from textwrap import dedent
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##################################
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# global structures
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##################################
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PTE_D = 1 << 7
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PTE_A = 1 << 6
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PTE_G = 1 << 5
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PTE_U = 1 << 4
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PTE_X = 1 << 3
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PTE_W = 1 << 2
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PTE_R = 1 << 1
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PTE_V = 1 << 0
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PTE_PTR_MASK = ~(PTE_W | PTE_R | PTE_X)
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pgdir = []
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pages = {}
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testcase_num = 0
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signature_len = 2000
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signature = [0xff for _ in range(signature_len)]
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# Base PPN, comes after 2 pages of test code and 2 pages of filler signature output space.
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# depending on your test however, this value may be different. You can use OVPsimPlus or QEMU with your testcode to find it.
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INITIAL_PPN = 0x80005
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##################################
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# classes
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##################################
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class Architecture:
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def __init__(self, xlen, svMode):
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if (xlen == 32):
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self.PTESIZE = 4 # bytes
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self.PTE_BITS = 32
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self.VPN_BITS = 20
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self.VPN_SEGMENT_BITS = 10
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self.PPN_BITS = 22
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self.LEVELS = 2
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elif (xlen == 64):
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if (svMode == 39):
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self.PTESIZE = 8
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self.PTE_BITS = 54
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self.VPN_BITS = 27
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self.VPN_SEGMENT_BITS = 9
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self.PPN_BITS = 44
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self.LEVELS = 3
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elif (svMode == 48):
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self.PTESIZE = 8
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self.PTE_BITS = 54
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self.VPN_BITS = 36
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self.VPN_SEGMENT_BITS = 9
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self.PPN_BITS = 44
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self.LEVELS = 4
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else:
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raise ValueError('Only Sv39 and Sv48 are implemented')
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else:
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raise ValueError('Only rv32 and rv64 are allowed.')
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self.PGSIZE = 2**12
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self.NPTENTRIES = self.PGSIZE // self.PTESIZE
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self.OFFSET_BITS = 12
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self.FLAG_BITS = 8
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self.VA_BITS = self.VPN_BITS + self.OFFSET_BITS
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class PageTableEntry:
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def __init__(self, ppn, flags, arch):
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assert 0 <= ppn and ppn < 2**arch.PPN_BITS, "Invalid physical page number for PTE"
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assert 0 <= flags and flags < 2**arch.FLAG_BITS, "Invalid flags for PTE"
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self.ppn = ppn
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self.flags = flags
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self.arch = arch
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def entry(self):
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return (self.ppn << (self.arch.PTE_BITS - self.arch.PPN_BITS)) | self.flags
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def __str__(self):
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return "0x{0:0{1}x}".format(self.entry(), self.arch.PTESIZE*2)
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def __repr__(self):
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return f"<ppn: {hex(self.ppn)}, flags: {self.flags:08b}>"
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class PageTable:
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"""
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Represents a single level of the page table, located at some physical page
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number `ppn` with symbol `name`, using a specified architecture `arch`.
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"""
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def __init__(self, name, ppn, arch):
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self.table = {}
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self.name = name
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self.ppn = ppn
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self.arch = arch
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self.children = 0
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pages[ppn] = self
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def add_entry(self, vpn_segment, ppn, flags):
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if not (0 <= vpn_segment < 2**self.arch.VPN_SEGMENT_BITS):
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raise ValueError("Invalid virtual page segment number")
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self.table[vpn_segment] = PageTableEntry(ppn, flags, self.arch)
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def add_mapping(self, va, pa, flags):
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"""
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Maps a virtual address `va` to a physical address `pa` with given `flags`,
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creating missing page table levels as needed.
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"""
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if not (0 <= va < 2**self.arch.VA_BITS):
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raise ValueError("Invalid virtual page number")
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vpn = virtual_to_vpn(va, self.arch)
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ppn = pa >> self.arch.OFFSET_BITS
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current_level = self
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pathname = self.name
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for level in range(self.arch.LEVELS - 1, -1, -1):
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if level == 0:
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current_level.add_entry(vpn[level], ppn, flags)
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elif vpn[level] in current_level.table:
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current_level = pages[current_level.table[vpn[level]].ppn]
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pathname += f"_{current_level.name}"
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else:
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next_level_ppn = next_ppn()
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current_level.add_entry(vpn[level], next_level_ppn, flags & PTE_PTR_MASK)
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pathname += f"_t{current_level.children}"
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current_level.children += 1
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pages[next_level_ppn] = PageTable(pathname, next_level_ppn, self.arch)
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current_level = pages[next_level_ppn]
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def assembly(self):
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# Sort the page table
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entries = list(sorted(self.table.items(), key=lambda item: item[0]))
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current_index = 0
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# Align the table
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asm = f".balign {self.arch.PGSIZE}\n{self.name}:\n"
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for entry in entries:
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vpn_index, pte = entry
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if current_index < vpn_index:
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asm += f" .fill {vpn_index - current_index}, {self.arch.PTESIZE}, 0\n"
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asm += f" .{self.arch.PTESIZE}byte {str(pte)}\n"
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current_index = vpn_index + 1
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if current_index < self.arch.NPTENTRIES:
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asm += f" .fill {self.arch.NPTENTRIES - current_index}, {self.arch.PTESIZE}, 0\n"
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return asm
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def __str__(self):
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return self.assembly()
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def __repr__(self):
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return f"<table: {self.table}>"
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##################################
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# functions
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##################################
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def virtual_to_vpn(vaddr, arch):
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if not (0 <= vaddr < 2**arch.VA_BITS):
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raise ValueError("Invalid physical address")
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page_number = [0 for _ in range(arch.LEVELS)]
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vaddr = vaddr >> arch.OFFSET_BITS
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mask = 2**arch.VPN_SEGMENT_BITS - 1
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for level in range(arch.LEVELS):
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page_number[level] = vaddr & mask
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vaddr = vaddr >> arch.VPN_SEGMENT_BITS
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return page_number
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next_free_ppn = INITIAL_PPN
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def next_ppn():
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global next_free_ppn
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ppn = next_free_ppn
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next_free_ppn += 1
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return ppn
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def print_pages():
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for page in pages:
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print(pages[page])
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##################################
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# helper variables
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##################################
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sv32 = Architecture(32, 32)
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sv39 = Architecture(64, 39)
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sv48 = Architecture(64, 48)
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if __name__ == "__main__":
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arch = sv39
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pgdir = PageTable("page_directory", next_ppn(), arch)
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# Directly map the first 20 pages of RAM
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for page in range(20):
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vaddr = 0x80000000 + (arch.PGSIZE * page)
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paddr = 0x80000000 + (arch.PGSIZE * page)
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pgdir.add_mapping(vaddr, paddr, PTE_D | PTE_A | PTE_R | PTE_W | PTE_U | PTE_X | PTE_V)
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# Map Vpn of of the offset below and the 20 pages after it mapped onto the same 20 pages of ram.
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# the first two of these are also the location of the output for each test.
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for page in range(40):
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vaddr = 0x00000000 + (arch.PGSIZE * page)
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paddr = 0x80000000 + (arch.PGSIZE * page)
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if page >= 20:
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pgdir.add_mapping(vaddr, paddr, PTE_D | PTE_A | PTE_R | PTE_W | PTE_U | PTE_X | 0) # gives me an invalid mapping where I can try to store/read to force a page fault.
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else:
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pgdir.add_mapping(vaddr, paddr, PTE_D | PTE_A | PTE_R | PTE_W | PTE_U | PTE_X | PTE_V)
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"""
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supervisor_pgdir = PageTable("sdir", next_ppn(), rv64)
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supervisor_pgdir.add_mapping(0x80000000, 0x80000000, PTE_R | PTE_W | PTE_X)
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supervisor_pgdir.add_mapping(0x80000001, 0x80000001, PTE_R | PTE_W | PTE_X)
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supervisor_pgdir.add_mapping(0x80001000, 0x80000000, PTE_R | PTE_W | PTE_X)
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supervisor_pgdir.add_mapping(0xffff0000, 0x80000000, PTE_R | PTE_W | PTE_X)
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"""
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print_pages()
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