Ross Thompson 00c61fc5b3 Found the DDR3 memory is not ready when issuing the first store.		2023-04-17 19:33:13 -05:00
..
artyddr3.ucf	Added more support for Arty A7 board.	2023-04-10 16:01:17 -05:00
constraints-ArtyA7.xdc	Finally we are building the fpga and can view the ila. we are getting out of reset, but we are stuck at PCM = 10b8.	2023-04-17 18:39:25 -05:00
constraints-vcu108.xdc
constraints-vcu118.xdc
debug2.xdc	Updated to help debut Jacob's crossbar woes.	2023-04-11 14:22:42 -05:00
debug4.xdc	Fixed more bugs in the ila debug constraints.	2023-04-11 14:32:53 -05:00
marked_debug.txt
small-debug.xdc	Found the DDR3 memory is not ready when issuing the first store.	2023-04-17 19:33:13 -05:00
test.file