3 Commits

Author	SHA1	Message	Date
Ross Thompson	d2272c0620	Found and fixed the major architecture issue with the mig 7 used in the arty a7 board. ... mig 7 is completely different from the ddr4 mig in that the internal pll does not general the required clocks. An external mmcm is required to general two inputs clocks and the required user clock.	2023-04-15 11:13:28 -05:00
Ross Thompson	c9445384d7	Realized we need a separate mmcm when using the mig 7 for ddr3 rather than the ddr4 mig. Go figure.	2023-04-14 18:02:16 -05:00
Ross Thompson	2abd164d03	Fixed syntax errors in arty7 top level.	2023-04-10 16:08:40 -05:00