5 Commits

Author	SHA1	Message	Date
Ross Thompson	4c8952de6a	Converted branch predictor preloads to use system verilog rather than modelsim's load command.	2021-03-15 12:39:44 -05:00
Ross Thompson	87ed6d510c	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2021-03-05 15:27:22 -06:00
Ross Thompson	301166d062	Oups. I forgot to update other do files with the commands to preload the branch predictor memories.	2021-03-05 15:23:53 -06:00
bbracker	0f4a231543	first merge of ahb fix	2021-03-05 14:24:22 -05:00
bbracker	9231646fb3	bus rw bugfix and peripherals testing	2021-02-12 00:02:45 -05:00