5 Commits

Author	SHA1	Message	Date
Ross Thompson	862bf2faae	Moved all instr/load/storeamo faults to mmu with the exception of instr misaligned fault.	2022-01-27 17:11:27 -06:00
Ross Thompson	4a75e69457	Merged in the debug ila updates.	2022-01-18 17:29:21 -06:00
Ross Thompson	459f4bd3b4	Hack "fix" to prevent interrupt from occuring during an integer divide. ... This is not the desired solution but will allow continued debuging of linux.	2022-01-12 14:17:16 -06:00
Ross Thompson	73c488914f	Added icache access and icache miss to performance counters.	2022-01-09 22:56:56 -06:00
David Harris	b36ace221e	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00