Ross Thompson
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e2343699d1
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Factored out InstrValidNotFlushedM from each csr*.sv to csr.sv
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2022-01-20 16:39:54 -06:00 |
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Ross Thompson
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4a75e69457
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Merged in the debug ila updates.
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2022-01-18 17:29:21 -06:00 |
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Ross Thompson
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a5f773220e
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Updated CSR modules to prevent writting the registers when flushing. This only effects architecture writes not side effect writes.
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2022-01-18 17:19:33 -06:00 |
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Ross Thompson
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73c488914f
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Added icache access and icache miss to performance counters.
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2022-01-09 22:56:56 -06:00 |
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David Harris
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120fb7863f
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Reformatted MIT license to 95 characters
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2022-01-07 12:58:40 +00:00 |
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David Harris
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b36ace221e
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Renamed wally-pipelined to pipelined
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2022-01-04 19:47:41 +00:00 |
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