10 Commits

Author	SHA1	Message	Date
Kip Macsai-Goren	bd87af478a	Changed mtval for instruction misaligned fault to get address from ieuAdrM (Jal/branch target address)	2022-04-22 22:46:11 +00:00
Ross Thompson	2376d66ec2	Added more ILA signals.	2022-04-02 16:39:45 -05:00
bbracker	69a0f6e00b	big interrupts refactor	2022-03-30 13:22:41 -07:00
bbracker	8ea25e591b	fix typo that Madeleine found	2022-03-28 15:39:29 -07:00
bbracker	d33de3ef6b	tabs vs spaces disagreement	2022-03-24 17:11:41 -07:00
bbracker	4b376e2834	1st attempt at multiple channel PLIC	2022-03-24 17:08:10 -07:00
Ross Thompson	71aad2d213	Moved WriteDataM register into LSU.	2022-03-23 14:17:59 -05:00
Ross Thompson	565ca4e4a3	Broken state. address translation not working after changes to hptw to support atomic updates to PT.	2022-02-16 23:37:36 -06:00
Ross Thompson	862bf2faae	Moved all instr/load/storeamo faults to mmu with the exception of instr misaligned fault.	2022-01-27 17:11:27 -06:00
David Harris	07425369fc	Renamed wallypipelinedhart to wallypipelinedcore	2022-01-20 16:02:08 +00:00