Ross Thompson
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a64a37d702
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Merge of main with the new icache and the branch predictor. I believe there is a bug in the icache with unaligned memory access. The second part of the access is incorrectly relying on the PCF being the address of the next two bytes of the instruction. However this is not always the case as the branch predictor can get the wrong target address. The icache needs to generate the +2 address internally.
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2021-03-30 23:18:20 -05:00 |
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Teo Ene
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385ce9a8f9
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Added BPTYPE to coremark_bare config
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2021-03-24 16:38:29 -05:00 |
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bbracker
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11d4a8ab34
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first pass at PLIC interface
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2021-03-22 10:14:21 -04:00 |
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Noah Boorstin
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bc1a0c6ee7
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change ifndef to generate/if
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2021-03-18 12:50:19 -04:00 |
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Noah Boorstin
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a2b0af460e
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everyone gets a bootram
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2021-03-18 12:35:37 -04:00 |
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Teo Ene
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d72d774a0b
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addition to last commit
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2021-03-17 14:52:31 -05:00 |
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Elizabeth Hedenberg
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d0ddb5f461
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replicating coremark changes into coremark bare
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2021-03-17 14:36:34 -04:00 |
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Teo Ene
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396dc61564
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Linux CoreMark and baremetal CoreMark split into two separate tests/configs
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2021-03-04 07:44:33 -06:00 |
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