Ross Thompson
2df6c6cb0f
It's almost working.
2023-04-18 14:24:59 -05:00
Ross Thompson
ac95087042
Improved constraints and set ddr3 voltage to correct 1.35V. This voltage is only for synthesis. However I'm concerned because the gui did not let me select 1.35V.
2023-04-17 20:05:59 -05:00
Ross Thompson
dd7f5310e4
Fixed timing constraint issue.
2023-04-17 19:53:43 -05:00
Ross Thompson
8bebc56b56
Finally we are building the fpga and can view the ila. we are getting out of reset, but we are stuck at PCM = 10b8.
2023-04-17 18:39:25 -05:00
Ross Thompson
5da5b76449
Fixed more issues with arty a7 constarints.
2023-04-16 13:25:02 -05:00
Ross Thompson
d2272c0620
Found and fixed the major architecture issue with the mig 7 used in the arty a7 board.
...
mig 7 is completely different from the ddr4 mig in that the internal pll does not general the required clocks. An external mmcm is required to general two inputs clocks and the required user clock.
2023-04-15 11:13:28 -05:00
Ross Thompson
c9445384d7
Realized we need a separate mmcm when using the mig 7 for ddr3 rather than the ddr4 mig. Go figure.
2023-04-14 18:02:16 -05:00
Ross Thompson
2abd164d03
Fixed syntax errors in arty7 top level.
2023-04-10 16:08:40 -05:00
