4 Commits

Author	SHA1	Message	Date
Ross Thompson	d6ff89b7e6	Swapped out the icachemem for cacheway. cacheway is modified to optionally support dirty bits.	2021-08-26 15:43:02 -05:00
Ross Thompson	d23b860c96	Moved LRU and storage for the LRU into a single module. Also found a subtle bug with the update address used to write the cache's memory. ... This was correct for the LRU but incorrect for the data, tag, valid, and dirty storage.	2021-08-25 21:09:42 -05:00
Ross Thompson	c5e2443298	Replaced dcache generate ORing with or_rows.	2021-08-25 13:46:36 -05:00
Ross Thompson	e5336f4ee1	Rename of DCacheMem to cacheway. ... simplified dcache names.	2021-08-25 13:33:15 -05:00