22 Commits

Author	SHA1	Message	Date
slmnemo	847c7930c4	added LSUBurstDone signal to signal when a burst has finished	2022-05-26 16:29:13 -07:00
slmnemo	08430a1e85	added burst size signals to the IFU, EBU, LSU, and busdp	2022-05-25 18:02:50 -07:00
David Harris	ce24c080d5	More unused signal cleanup	2022-05-12 15:26:08 +00:00
David Harris	5670f77de2	More unused signal cleanup	2022-05-12 15:21:09 +00:00
David Harris	e2e63ca9a8	Clean up unused signals	2022-05-12 14:49:58 +00:00
David Harris	8166fd772e	Added M prefix for MTimerInt and MSwInt to distinguish from future supervisor SwInt	2022-05-11 15:08:33 +00:00
David Harris	137b411bea	Removed M suffix from interrupts because they are generated asynchronously to pipeline	2022-05-11 14:41:55 +00:00
David Harris	4f1b0fdc64	Preliminary support for big endian modes. Regression passes but no big endian tests written yet.	2022-05-08 06:46:35 +00:00
David Harris	a516f89f22	WFI terminates when an interrupt is pending even if interrupts are globally disabled	2022-05-08 04:30:46 +00:00
David Harris	412d4656ed	Zero'd wfiM when ZICSR not supported to fix hang in E tests	2022-05-05 15:32:13 +00:00
David Harris	1a7599ce94	Changed WFI to stall pipeline in memory stage	2022-05-05 02:03:44 +00:00
David Harris	1166c40059	FPU generates illegal instruction if MSTATUS.FS = 00	2022-05-03 11:56:31 +00:00
Kip Macsai-Goren	bd87af478a	Changed mtval for instruction misaligned fault to get address from ieuAdrM (Jal/branch target address)	2022-04-22 22:46:11 +00:00
Ross Thompson	2376d66ec2	Added more ILA signals.	2022-04-02 16:39:45 -05:00
bbracker	69a0f6e00b	big interrupts refactor	2022-03-30 13:22:41 -07:00
bbracker	8ea25e591b	fix typo that Madeleine found	2022-03-28 15:39:29 -07:00
bbracker	d33de3ef6b	tabs vs spaces disagreement	2022-03-24 17:11:41 -07:00
bbracker	4b376e2834	1st attempt at multiple channel PLIC	2022-03-24 17:08:10 -07:00
Ross Thompson	71aad2d213	Moved WriteDataM register into LSU.	2022-03-23 14:17:59 -05:00
Ross Thompson	565ca4e4a3	Broken state. address translation not working after changes to hptw to support atomic updates to PT.	2022-02-16 23:37:36 -06:00
Ross Thompson	862bf2faae	Moved all instr/load/storeamo faults to mmu with the exception of instr misaligned fault.	2022-01-27 17:11:27 -06:00
David Harris	07425369fc	Renamed wallypipelinedhart to wallypipelinedcore	2022-01-20 16:02:08 +00:00