17 Commits

Author	SHA1	Message	Date
Limnanthes Serafini	98a56dcd66	Further comments and attribution.	2023-04-05 02:46:31 -07:00
Limnanthes Serafini	47a8cf3993	Outfiles for the failing tests.	2023-04-05 02:42:09 -07:00
Limnanthes Serafini	8f3413f0d5	CacheSim edits, tests. I/D$ logging, Lim's version	2023-04-04 21:12:35 -07:00
David Harris	5ce476241b	Debug test case updates	2023-02-21 09:33:36 -08:00
David Harris	4414173e7a	Debug test case update	2023-02-15 06:42:38 -08:00
David Harris	93637fd9cb	debug simulating, produing discrepancy	2023-02-06 16:47:56 -08:00
David Harris	bb39570576	Fixed floating point crash in debug.S	2023-02-06 15:38:57 -08:00
David Harris	aba8b9a64b	More progress on debug.S, but it crashes in Spike	2023-02-04 09:59:22 -08:00
David Harris	1bb5599806	Developing debug test	2023-02-04 08:31:47 -08:00
David Harris	0f7ea52f9b	Started making debug testcase	2023-02-04 08:18:55 -08:00
Ross Thompson	6cbce9672d	Possibly working speculative global history.	2023-01-08 23:46:53 -06:00
Ross Thompson	0eda4b1ab3	core part of global history works now. forwarding is still broken.	2023-01-08 23:35:02 -06:00
Ross Thompson	0eceeeeeaa	Simiplified global history branch predictor.	2023-01-04 23:41:55 -06:00
Ross Thompson	4f56e6ff5d	I think I finally fixed a long hidden bug in the replacement policy. The figures in the textbook are correct. There was small bug in the rtl.	2022-12-18 18:30:35 -06:00
Ross Thompson	b4229c01ca	Have a basic cache test to fill all ways and sets.	2022-12-18 17:20:30 -06:00
Ross Thompson	376b01fcb8	Attempted to make a cache test.	2022-12-18 17:15:08 -06:00
Ross Thompson	ebdac1a9d0	Updated tests for fpga and BP.	2022-12-18 16:24:26 -06:00