2 Commits

Author	SHA1	Message	Date
Ross Thompson	78db3654c6	We now have a solid rough draft of the 2 bit sat counter branch predictor with BTB and RAS. ... This is not yet tested but the system verilog does compile.	2021-02-15 14:51:39 -06:00
Ross Thompson	3ec1f668fc	added branch predictor 2 bit table + SRAM model. The SRAM model is only approximate, but it does correctly model the read and write pipelined behavior.	2021-02-14 15:13:55 -06:00