3 Commits

Author	SHA1	Message	Date
Ross Thompson	689c32215f	Fixed bugs in ifu spills and missing reset on bus data register.	2022-02-10 18:11:57 -06:00
David Harris	da8819d64b	changed DMEM and IMEM configurations to support BUS/TIM/CACHE	2022-02-03 00:41:09 +00:00
Ross Thompson	a4f6653cd8	Encapsulated the bus data path into a separate module.	2022-01-31 10:15:48 -06:00