19 Commits

Author	SHA1	Message	Date
Ross Thompson	fe22fd2db8	added clock gater to floating point divider to speed up simulation time.	2021-06-01 13:46:21 -05:00
Katherine Parry	778ba6bbf5	classify unit created and passes imperas tests	2021-05-27 18:53:55 -04:00
Katherine Parry	1459d840ed	All compare instructions pass imperas tests	2021-05-27 15:23:28 -04:00
Katherine Parry	309e6c3dc1	FADD and FSUB imperas tests pass	2021-05-26 12:33:33 -04:00
Katherine Parry	e7190b0690	renamed top level FPU wires	2021-05-25 20:04:34 -04:00
James E. Stine	bb5404e14a	Update FPregfile to use more compact code and better structure for ease in reading	2021-05-25 13:21:59 -05:00
Katherine Parry	90d5fdba04	FMV.X.D imperas test passes	2021-05-24 14:44:30 -04:00
James E. Stine	6f38b7633c	Update header for FPadd	2021-05-24 08:28:16 -05:00
Katherine Parry	70968a4ec3	FSD and FLD imperas tests pass	2021-05-23 18:33:14 -04:00
Katherine Parry	06af239e6c	FMV.D.X imperas test passes	2021-05-20 22:17:59 -04:00
Katherine Parry	9464c9022d	floating point infinite loop removed from imperas tests	2021-05-18 10:42:51 -04:00
Katherine Parry	ff5a809c26	fpu warnings fixed/commented	2021-05-03 19:17:09 +00:00
Katherine Parry	db95151d8d	fpu imperas tests run	2021-05-01 02:18:01 +00:00
Teo Ene	ddc98e7d08	Fixed most relevant remaining synthesis compilation warnings with Ben	2021-04-21 16:06:27 -05:00
Katherine Parry	636e2de9df	integraded the FMA into the FPU	2021-04-15 18:28:00 +00:00
Teo Ene	1018a10625	Various code syntax changes to bring HDL to a synthesizable level	2021-04-13 11:27:12 -05:00
Katherine Parry	f4cb92ae71	fixed FPU lint warnings	2021-04-08 18:03:21 +00:00
Katherine Parry	27cb94e7af	fixed FPU lint warnings	2021-04-08 17:55:25 +00:00
Katherine Parry	e6a7353847	Added missing files in FPU	2021-04-04 18:09:13 +00:00