Ross Thompson
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4d14c714a7
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Fixed forwarding around the 2 bit predictor.
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2021-03-04 13:01:41 -06:00 |
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Ross Thompson
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52d95d415f
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Converted to using the BTB to predict the instruction class.
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2021-03-04 09:23:35 -06:00 |
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Ross Thompson
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c6ebe7733b
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Hacked the sram memory models to reset their internal registers. This allows the simulation to run but is only temporary.
About 149307ns of simulation run.
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2021-02-18 21:32:15 -06:00 |
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Ross Thompson
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5df7e959f3
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Integrated the branch predictor into the hardward. Not yet working.
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2021-02-17 22:19:17 -06:00 |
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Ross Thompson
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78db3654c6
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We now have a solid rough draft of the 2 bit sat counter branch predictor with BTB and RAS.
This is not yet tested but the system verilog does compile.
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2021-02-15 14:51:39 -06:00 |
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