2 Commits

Author	SHA1	Message	Date
Ross Thompson	c3c9c327b7	Fixed more constraint issues in fpga. ... Added back in the ILA. Design does not work yet. Stil having issues with order of automatic clock and I/O constraint ordering. Added back in the preload for the boottim.	2021-12-05 15:14:18 -06:00
Ross Thompson	0d47749cb5	Separated timing constraints from ILA.	2021-12-01 18:15:04 -06:00