Alec Vercruysse
61e19c2ddf
Make CacheWay flush and dirty logic dependent on !READ_ONLY_CACHE
...
To increase coverage. Read-only caches do not have flushes since
they do not have dirty bits.
2023-04-05 11:48:18 -07:00
Alec Vercruysse
247af17b6b
remove ClearValid from cache
...
The cachefsm hardwired ClearValid logic to zero.
This signal might've been added to potentially add extra functionality
later. Unless that functionality is added, however, it negatively
impacts coverage. If the goal is to maximize coverage, this signal
should be removed and only added when it becomes necessary.
2023-04-05 11:48:18 -07:00
Alec Vercruysse
3867142f10
change i$ cachetagmem from ram1p1rwbe -> ram1p1rwe
...
the byte write-enables were always tied high, so we can use
RAM without byte-enable to increase coverage.
2023-04-05 11:48:18 -07:00
Alec Vercruysse
277f507e9a
add ram1p1rwe for read-only cache ways (remove byte-enable)
...
- increases coverage
2023-04-05 11:48:18 -07:00
Alec Vercruysse
c0206cfcb3
fix typo in cachway setValid input comment
2023-04-05 11:48:18 -07:00
Ross Thompson
0511c73e22
Replaced tabs -> spaces cache.
2023-03-24 15:15:38 -05:00
Ross Thompson
cb019f9aed
Updated CAdr to CacheSet.
2023-03-13 14:53:00 -05:00
Ross Thompson
e233b63752
Replaced DCACHE parameter with READ_ONLY_CACHE as the name was confusing in chapter 10.
2023-03-12 13:21:22 -05:00
David Harris
99d179dd3e
Removed pipelined level of hierarchy
2023-02-02 14:14:11 -08:00
