Shreya Sanghai
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74f1641c5a
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Merge branch 'counters' into main
added a configurable number of performance counters
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2021-03-16 11:01:30 -04:00 |
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Ross Thompson
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4c8952de6a
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Converted branch predictor preloads to use system verilog rather than modelsim's load command.
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2021-03-15 12:39:44 -05:00 |
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Thomas Fleming
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1294235837
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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main
Conflicts:
wally-pipelined/src/ebu/ahblite.sv
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2021-03-11 00:15:58 -05:00 |
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Ross Thompson
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301166d062
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Oups. I forgot to update other do files with the commands to preload the branch predictor memories.
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2021-03-05 15:23:53 -06:00 |
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Thomas Fleming
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8c97143be6
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Place tlb parameters into constant header file
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2021-03-05 13:35:24 -05:00 |
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Shreya Sanghai
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f0ec365117
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added performance counters
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2021-03-04 11:42:52 -05:00 |
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Teo Ene
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61b872a3e8
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Changed TIMBASE in coremark config file
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2021-02-25 11:03:41 -06:00 |
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Teo Ene
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3e5de35fc4
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Added provisional coremark files from work with Elizabeth
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2021-02-24 20:07:07 -06:00 |
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