removed Funct7 in Execute Stage

This commit is contained in:
Kevin Kim 2023-02-17 16:12:09 -08:00
parent 9bf11471aa
commit fcae58fcc7
5 changed files with 5 additions and 11 deletions

View File

@ -34,7 +34,6 @@ module alu #(parameter WIDTH=32) (
input logic [2:0] ALUControl, // With Funct3, indicates operation to perform input logic [2:0] ALUControl, // With Funct3, indicates operation to perform
input logic [2:0] ALUSelect, // ALU mux select signal input logic [2:0] ALUSelect, // ALU mux select signal
input logic [3:0] BSelect, // One-Hot encoding of if it's a ZBA_ZBB_ZBC_ZBS instruction input logic [3:0] BSelect, // One-Hot encoding of if it's a ZBA_ZBB_ZBC_ZBS instruction
input logic [6:0] Funct7, // Funct7 from execute stage (we only need this for b instructions and should be optimized out later)
input logic [2:0] Funct3, // With ALUControl, indicates operation to perform NOTE: Change signal name to ALUSelect input logic [2:0] Funct3, // With ALUControl, indicates operation to perform NOTE: Change signal name to ALUSelect
output logic [WIDTH-1:0] Result, // ALU result output logic [WIDTH-1:0] Result, // ALU result
output logic [WIDTH-1:0] Sum); // Sum of operands output logic [WIDTH-1:0] Sum); // Sum of operands

View File

@ -39,7 +39,6 @@ module bmuctrl(
output logic [3:0] BSelectD, // Indicates if ZBA_ZBB_ZBC_ZBS instruction in one-hot encoding in Decode stage output logic [3:0] BSelectD, // Indicates if ZBA_ZBB_ZBC_ZBS instruction in one-hot encoding in Decode stage
// Execute stage control signals // Execute stage control signals
input logic StallE, FlushE, // Stall, flush Execute stage input logic StallE, FlushE, // Stall, flush Execute stage
output logic [6:0] Funct7E, // Instruction's funct7 field (note: eventually want to get rid of this)
output logic [2:0] ALUSelectE, output logic [2:0] ALUSelectE,
output logic [3:0] BSelectE // Indicates if ZBA_ZBB_ZBC_ZBS instruction in one-hot encoding output logic [3:0] BSelectE // Indicates if ZBA_ZBB_ZBC_ZBS instruction in one-hot encoding
); );
@ -105,5 +104,5 @@ module bmuctrl(
// BMU Execute stage pipieline control register // BMU Execute stage pipieline control register
flopenrc#(14) controlregBMU(clk, reset, FlushE, ~StallE, {Funct7D, ALUSelectD, BSelectD}, {Funct7E, ALUSelectE, BSelectE}); flopenrc#(7) controlregBMU(clk, reset, FlushE, ~StallE, {ALUSelectD, BSelectD}, {ALUSelectE, BSelectE});
endmodule endmodule

View File

@ -49,7 +49,6 @@ module controller(
output logic [2:0] ALUSelectE, // ALU mux select signal output logic [2:0] ALUSelectE, // ALU mux select signal
output logic MemReadE, CSRReadE, // Instruction reads memory, reads a CSR (needed for Hazard unit) output logic MemReadE, CSRReadE, // Instruction reads memory, reads a CSR (needed for Hazard unit)
output logic [2:0] Funct3E, // Instruction's funct3 field output logic [2:0] Funct3E, // Instruction's funct3 field
output logic [6:0] Funct7E, // Instruction's funct7 field
output logic IntDivE, // Integer divide output logic IntDivE, // Integer divide
output logic MDUE, // MDU (multiply/divide) operatio output logic MDUE, // MDU (multiply/divide) operatio
output logic W64E, // RV64 W-type operation output logic W64E, // RV64 W-type operation
@ -203,12 +202,11 @@ module controller(
assign ALUControlD = {W64D, SubArithD, ALUOpD}; assign ALUControlD = {W64D, SubArithD, ALUOpD};
if (`ZBS_SUPPORTED) begin: bitmanipi //change the conditional expression to OR any Z supported flags if (`ZBS_SUPPORTED) begin: bitmanipi //change the conditional expression to OR any Z supported flags
bmuctrl bmuctrl(.clk, .reset, .StallD, .FlushD, .InstrD, .ALUSelectD, .BSelectD, .StallE, .FlushE, .Funct7E, .ALUSelectE, .BSelectE); bmuctrl bmuctrl(.clk, .reset, .StallD, .FlushD, .InstrD, .ALUSelectD, .BSelectD, .StallE, .FlushE, .ALUSelectE, .BSelectE);
end else begin: bitmanipi end else begin: bitmanipi
assign ALUSelectD = Funct3D; assign ALUSelectD = Funct3D;
assign ALUSelectE = Funct3E; assign ALUSelectE = Funct3E;
assign BSelectE = 4'b000; assign BSelectE = 4'b000;
assign Funct7E = 7'b0;
end end
// Fences // Fences

View File

@ -9,7 +9,6 @@ module datapath (
input logic [`XLEN-1:0] PCE, // PC in Execute stage input logic [`XLEN-1:0] PCE, // PC in Execute stage
input logic [`XLEN-1:0] PCLinkE, // PC + 4 (of instruction in Execute stage) input logic [`XLEN-1:0] PCLinkE, // PC + 4 (of instruction in Execute stage)
input logic [2:0] Funct3E, // Funct3 field of instruction in Execute stage input logic [2:0] Funct3E, // Funct3 field of instruction in Execute stage
input logic [6:0] Funct7E, // Funct7 field of instruction in Execute stage
input logic StallE, FlushE, // Stall, flush Execute stage input logic StallE, FlushE, // Stall, flush Execute stage
input logic [1:0] ForwardAE, ForwardBE, // Forward ALU operands from later stages input logic [1:0] ForwardAE, ForwardBE, // Forward ALU operands from later stages
input logic [2:0] ALUControlE, // Indicate operation ALU performs input logic [2:0] ALUControlE, // Indicate operation ALU performs
@ -83,7 +82,7 @@ module datapath (
comparator #(`XLEN) comp(ForwardedSrcAE, ForwardedSrcBE, BranchSignedE, FlagsE); comparator #(`XLEN) comp(ForwardedSrcAE, ForwardedSrcBE, BranchSignedE, FlagsE);
mux2 #(`XLEN) srcamux(ForwardedSrcAE, PCE, ALUSrcAE, SrcAE); mux2 #(`XLEN) srcamux(ForwardedSrcAE, PCE, ALUSrcAE, SrcAE);
mux2 #(`XLEN) srcbmux(ForwardedSrcBE, ImmExtE, ALUSrcBE, SrcBE); mux2 #(`XLEN) srcbmux(ForwardedSrcBE, ImmExtE, ALUSrcBE, SrcBE);
alu #(`XLEN) alu(SrcAE, SrcBE, ALUControlE, ALUSelectE, BSelectE, Funct7E, Funct3E, ALUResultE, IEUAdrE); alu #(`XLEN) alu(SrcAE, SrcBE, ALUControlE, ALUSelectE, BSelectE, Funct3E, ALUResultE, IEUAdrE);
mux2 #(`XLEN) altresultmux(ImmExtE, PCLinkE, JumpE, AltResultE); mux2 #(`XLEN) altresultmux(ImmExtE, PCLinkE, JumpE, AltResultE);
mux2 #(`XLEN) ieuresultmux(ALUResultE, AltResultE, ALUResultSrcE, IEUResultE); mux2 #(`XLEN) ieuresultmux(ALUResultE, AltResultE, ALUResultSrcE, IEUResultE);

View File

@ -74,7 +74,6 @@ module ieu (
logic [2:0] ImmSrcD; // Select type of immediate extension logic [2:0] ImmSrcD; // Select type of immediate extension
logic [1:0] FlagsE; // Comparison flags ({eq, lt}) logic [1:0] FlagsE; // Comparison flags ({eq, lt})
logic [6:0] Funct7E; // Instruction's funct7 field in execute stage
logic [2:0] ALUControlE; // ALU control indicates function to perform logic [2:0] ALUControlE; // ALU control indicates function to perform
logic ALUSrcAE, ALUSrcBE; // ALU source operands logic ALUSrcAE, ALUSrcBE; // ALU source operands
logic [2:0] ResultSrcW; // Selects result in Writeback stage logic [2:0] ResultSrcW; // Selects result in Writeback stage
@ -98,14 +97,14 @@ module ieu (
.clk, .reset, .StallD, .FlushD, .InstrD, .ImmSrcD, .clk, .reset, .StallD, .FlushD, .InstrD, .ImmSrcD,
.IllegalIEUInstrFaultD, .IllegalBaseInstrFaultD, .StallE, .FlushE, .FlagsE, .FWriteIntE, .IllegalIEUInstrFaultD, .IllegalBaseInstrFaultD, .StallE, .FlushE, .FlagsE, .FWriteIntE,
.PCSrcE, .ALUControlE, .ALUSrcAE, .ALUSrcBE, .ALUResultSrcE, .ALUSelectE, .BSelectE, .MemReadE, .CSRReadE, .PCSrcE, .ALUControlE, .ALUSrcAE, .ALUSrcBE, .ALUResultSrcE, .ALUSelectE, .BSelectE, .MemReadE, .CSRReadE,
.Funct3E, .Funct7E, .IntDivE, .MDUE, .W64E, .JumpE, .SCE, .BranchSignedE, .StallM, .FlushM, .MemRWM, .Funct3E, .IntDivE, .MDUE, .W64E, .JumpE, .SCE, .BranchSignedE, .StallM, .FlushM, .MemRWM,
.CSRReadM, .CSRWriteM, .PrivilegedM, .AtomicM, .Funct3M, .CSRReadM, .CSRWriteM, .PrivilegedM, .AtomicM, .Funct3M,
.RegWriteM, .InvalidateICacheM, .FlushDCacheM, .InstrValidM, .InstrValidE, .InstrValidD, .FWriteIntM, .RegWriteM, .InvalidateICacheM, .FlushDCacheM, .InstrValidM, .InstrValidE, .InstrValidD, .FWriteIntM,
.StallW, .FlushW, .RegWriteW, .IntDivW, .ResultSrcW, .CSRWriteFenceM, .StoreStallD); .StallW, .FlushW, .RegWriteW, .IntDivW, .ResultSrcW, .CSRWriteFenceM, .StoreStallD);
datapath dp( datapath dp(
.clk, .reset, .ImmSrcD, .InstrD, .StallE, .FlushE, .ForwardAE, .ForwardBE, .clk, .reset, .ImmSrcD, .InstrD, .StallE, .FlushE, .ForwardAE, .ForwardBE,
.ALUControlE, .Funct3E, .Funct7E, .ALUSrcAE, .ALUSrcBE, .ALUResultSrcE, .ALUSelectE, .JumpE, .BranchSignedE, .ALUControlE, .Funct3E, .ALUSrcAE, .ALUSrcBE, .ALUResultSrcE, .ALUSelectE, .JumpE, .BranchSignedE,
.PCE, .PCLinkE, .FlagsE, .IEUAdrE, .ForwardedSrcAE, .ForwardedSrcBE, .BSelectE, .PCE, .PCLinkE, .FlagsE, .IEUAdrE, .ForwardedSrcAE, .ForwardedSrcBE, .BSelectE,
.StallM, .FlushM, .FWriteIntM, .FIntResM, .SrcAM, .WriteDataM, .FCvtIntW, .StallM, .FlushM, .FWriteIntM, .FIntResM, .SrcAM, .WriteDataM, .FCvtIntW,
.StallW, .FlushW, .RegWriteW, .IntDivW, .SquashSCW, .ResultSrcW, .ReadDataW, .FCvtIntResW, .StallW, .FlushW, .RegWriteW, .IntDivW, .SquashSCW, .ResultSrcW, .ReadDataW, .FCvtIntResW,