forked from Github_Repos/cvw
		
	Fix misa bug
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				@ -108,7 +108,7 @@ module csrm #(parameter
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  logic            WritePMPADDRM [0:15]; 
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  // MISA is hardwired.  Spec says it could be written to disable features, but this is not supported by Wally
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  assign MISA_REGW = {(`XLEN == 32 ? 2'b01 : 2'b10), {(`XLEN-28){1'b0}}, `MISA};
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  assign MISA_REGW = {(`XLEN == 32 ? 2'b01 : 2'b10), {(`XLEN-28){1'b0}}, {`MISA}[25:0]};
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  // Write machine Mode CSRs 
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  assign WriteMSTATUSM = CSRMWriteM && (CSRAdrM == MSTATUS);
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