forked from Github_Repos/cvw
changed tlbphysicalpagemask to structural
This commit is contained in:
parent
f960561cbb
commit
ee3a321002
@ -116,14 +116,22 @@ module tlb #(parameter TLB_ENTRIES = 8,
|
||||
// Determine whether to write TLB
|
||||
assign VirtualPageNumber = Address[`VPN_BITS+11:12];
|
||||
|
||||
tlbcontrol tlbcontrol(.*);
|
||||
// tlbcontrol tlbcontrol(.*);
|
||||
tlbcontrol tlbcontrol(.SATP_REGW, .Address, .STATUS_MXR, .STATUS_SUM, .STATUS_MPRV, .STATUS_MPP,
|
||||
.PrivilegeModeW, .ReadAccess, .WriteAccess, .DisableTranslation, .TLBFlush,
|
||||
.PTEAccessBits, .CAMHit, .TLBMiss, .TLBHit, .TLBPageFault, .EffectivePrivilegeMode,
|
||||
.SV39Mode, .Translate);
|
||||
|
||||
// TLB entries are evicted according to the LRU algorithm
|
||||
tlblru #(TLB_ENTRIES) lru(.*);
|
||||
tlblru #(TLB_ENTRIES) lru(.clk, .reset, .TLBWrite, .TLBFlush, .ReadLines, .CAMHit, .WriteEnables);
|
||||
|
||||
// TLB memory
|
||||
tlbram #(TLB_ENTRIES) tlbram(.*);
|
||||
tlbcam #(TLB_ENTRIES, `VPN_BITS + `ASID_BITS, `VPN_SEGMENT_BITS) tlbcam(.*);
|
||||
// tlbram #(TLB_ENTRIES) tlbram(.*);
|
||||
tlbram #(TLB_ENTRIES) tlbram(.clk, .reset, .PTE, .ReadLines, .WriteEnables, .PhysicalPageNumber, .PTEAccessBits, .PTE_G);
|
||||
|
||||
// tlbcam #(TLB_ENTRIES, `VPN_BITS + `ASID_BITS, `VPN_SEGMENT_BITS) tlbcam(.*);
|
||||
tlbcam #(TLB_ENTRIES, `VPN_BITS + `ASID_BITS, `VPN_SEGMENT_BITS)
|
||||
tlbcam(.clk, .reset, .VirtualPageNumber, .PageTypeWriteVal, .SV39Mode, .TLBFlush, .WriteEnables, .PTE_G, .ASID,
|
||||
.ReadLines, .HitPageType, .CAMHit);
|
||||
|
||||
// Replace segments of the virtual page number with segments of the physical
|
||||
// page number. For 4 KB pages, the entire virtual page number is replaced.
|
||||
|
@ -29,9 +29,9 @@
|
||||
`include "wally-config.vh"
|
||||
|
||||
module tlbphysicalpagemask (
|
||||
input logic [`VPN_BITS-1:0] VPN,
|
||||
input logic [`PPN_BITS-1:0] PPN,
|
||||
input logic [1:0] PageType,
|
||||
input logic [`VPN_BITS-1:0] VirtualPageNumber,
|
||||
input logic [`PPN_BITS-1:0] PhysicaPageNumber,
|
||||
input logic [1:0] HitPageType,
|
||||
output logic [`PPN_BITS-1:0] MixedPageNumber
|
||||
);
|
||||
|
||||
@ -43,13 +43,13 @@ module tlbphysicalpagemask (
|
||||
if (`XLEN == 32)
|
||||
// kilopage: 22 bits of PPN, 0 bits of VPN
|
||||
// megapage: 12 bits of PPN, 10 bits of VPN
|
||||
mux2 #(22) pnm(22'h3FFFFF, 22'h3FFC00, PageType[0], PageNumberMask);
|
||||
mux2 #(22) pnm(22'h3FFFFF, 22'h3FFC00, HitPageType[0], PageNumberMask);
|
||||
else
|
||||
// kilopage: 44 bits of PPN, 0 bits of VPN
|
||||
// megapage: 35 bits of PPN, 9 bits of VPN
|
||||
// gigapage: 26 bits of PPN, 18 bits of VPN
|
||||
// terapage: 17 bits of PPN, 27 bits of VPN
|
||||
mux4 #(44) pnm(44'hFFFFFFFFFFF, 44'hFFFFFFFFE00, 44'hFFFFFFC0000, 44'hFFFF8000000, PageType, PageNumberMask);
|
||||
mux4 #(44) pnm(44'hFFFFFFFFFFF, 44'hFFFFFFFFE00, 44'hFFFFFFC0000, 44'hFFFF8000000, HitPageType, PageNumberMask);
|
||||
endgenerate
|
||||
/* always_comb
|
||||
|
||||
@ -73,7 +73,7 @@ module tlbphysicalpagemask (
|
||||
endgenerate */
|
||||
|
||||
// merge low segments of VPN with high segments of PPN decided by the pagetype.
|
||||
assign ZeroExtendedVPN = {{EXTRA_BITS{1'b0}}, VPN}; // forces the VPN to be the same width as PPN.
|
||||
assign MixedPageNumber = (ZeroExtendedVPN & ~PageNumberMask) | (PPN & PageNumberMask);
|
||||
assign ZeroExtendedVPN = {{EXTRA_BITS{1'b0}}, VirtualPageNumber}; // forces the VPN to be the same width as PPN.
|
||||
assign MixedPageNumber = (ZeroExtendedVPN & ~PageNumberMask) | (PhysicalPageNumber & PageNumberMask);
|
||||
|
||||
endmodule
|
||||
|
Loading…
Reference in New Issue
Block a user