Optimization of cacheway.

This commit is contained in:
Ross Thompson 2022-11-29 18:30:47 -06:00
parent 1e2180ef98
commit e3577781b0

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@ -116,7 +116,8 @@ module cacheway #(parameter NUMLINES=512, parameter LINELEN = 256, TAGLEN = 26,
end
// AND portion of distributed read multiplexers
mux3 #(1) selecteddatamux(HitWay, VictimWay, FlushWay, {SelFlush, SelEvict}, SelData);
//mux3 #(1) selecteddatamux(HitWay, VictimWay, FlushWay, {SelFlush, SelEvict}, SelData);
mux2 #(1) selecteddatamux(HitWay, SelTag, SelFlush | SelEvict, SelData);
assign ReadDataLineWay = SelData ? ReadDataLine : '0; // AND part of AO mux.
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