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Modify muldiv.sv to handle W instructions for 64-bits

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This commit is contained in:
James E. Stine 2021-05-31 23:27:42 -04:00
parent 46a232b862
commit ddbdd0d5a2
3 changed files with 19 additions and 9 deletions
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1
wally-pipelined/src/muldiv/div.sv
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@ -87,7 +87,6 @@ module intdiv #(parameter WIDTH=64)
// is 0 and thus a divide by 0 exception. This div0
// exception is given to FSM to tell the operation to
// quit gracefully.
lzd_hier #(WIDTH) p1 (.ZP(P), .ZV(V), .B(twoD));
shift_left #(WIDTH) p2 (twoD, P, op2);
assign op1 = twoN;

17
wally-pipelined/src/muldiv/muldiv.sv
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@ -53,6 +53,7 @@ module muldiv (
logic [2:0] Funct3E_Q;
logic div0error;
logic [`XLEN-1:0] N, D;
logic [`XLEN-1:0] Num0, Den0;
logic gclk;
logic DivStartE;
@ -69,13 +70,23 @@ module muldiv (
end
assign gclk = enable_q & clk;
// Handle sign extension for W-type instructions
if (`XLEN == 64) begin // RV64 has W-type instructions
assign Num0 = W64E ? {{32{SrcAE[31]&signedDivide}}, SrcAE[31:0]} : SrcAE;
assign Den0 = W64E ? {{32{SrcBE[31]&signedDivide}}, SrcBE[31:0]} : SrcBE;
end else begin // RV32 has no W-type instructions
assign Num0 = SrcAE;
assign Den0 = SrcAE;
end
// capture the Numerator/Denominator
flopenrc #(`XLEN) reg_num (.d(SrcAE), .q(N),
flopenrc #(`XLEN) reg_num (.d(Num0), .q(N),
.en(startDivideE), .clear(DivDoneE),
.reset(reset), .clk(~gclk));
flopenrc #(`XLEN) reg_den (.d(SrcBE), .q(D),
flopenrc #(`XLEN) reg_den (.d(Den0), .q(D),
.en(startDivideE), .clear(DivDoneE),
.reset(reset), .clk(~gclk));
.reset(reset), .clk(~gclk));
assign signedDivide = (Funct3E[2]&~Funct3E[1]&~Funct3E[0]) | (Funct3E[2]&Funct3E[1]&~Funct3E[0]);
intdiv #(`XLEN) div (QuotE, RemE, DivDoneE, DivBusyE, div0error, N, D, gclk, reset, startDivideE, signedDivide);

10
wally-pipelined/testbench/testbench-imperas.sv
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@ -166,12 +166,12 @@ string tests32f[] = '{
"rv64m/I-MULW-01", "3000",
"rv64m/I-DIV-01", "3000",
"rv64m/I-DIVU-01", "3000",
//"rv64m/I-DIVUW-01", "3000",
//"rv64m/I-DIVW-01", "3000",
"rv64m/I-DIVUW-01", "3000",
"rv64m/I-DIVW-01", "3000",
"rv64m/I-REM-01", "3000",
"rv64m/I-REMU-01", "3000"
//"rv64m/I-REMUW-01", "3000",
//"rv64m/I-REMW-01", "3000"
"rv64m/I-REMU-01", "3000",
"rv64m/I-REMUW-01", "3000",
"rv64m/I-REMW-01", "3000"
};
string tests64ic[] = '{