forked from Github_Repos/cvw
		
	Added misa test for both 32 and 64 bits
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				@ -1489,7 +1489,8 @@ string imperas32f[] = '{
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    "rv64i_m/privilege/WALLY-PMA", "40A0",
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					    "rv64i_m/privilege/WALLY-PMA", "40A0",
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    "rv64i_m/privilege/WALLY-minfo-01", "40A0",
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					    "rv64i_m/privilege/WALLY-minfo-01", "40A0",
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    "rv64i_m/privilege/WALLY-CSR-permission-s-01", "50A0",
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					    "rv64i_m/privilege/WALLY-CSR-permission-s-01", "50A0",
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    "rv64i_m/privilege/WALLY-CSR-permission-u-01", "50A0"
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					    "rv64i_m/privilege/WALLY-CSR-permission-u-01", "50A0",
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					    "rv64i_m/privilege/WALLY-misa-01", "40A0"
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 };
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					 };
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 string wally64periph[] = '{
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					 string wally64periph[] = '{
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@ -1552,7 +1553,8 @@ string wally32i[] = '{
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    "rv32i_m/privilege/WALLY-PMP", "4080",
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					    "rv32i_m/privilege/WALLY-PMP", "4080",
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    "rv32i_m/privilege/WALLY-CSR-permission-s-01", "5080",
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					    "rv32i_m/privilege/WALLY-CSR-permission-s-01", "5080",
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    "rv32i_m/privilege/WALLY-CSR-permission-u-01", "5080",
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					    "rv32i_m/privilege/WALLY-CSR-permission-u-01", "5080",
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    "rv32i_m/privilege/WALLY-minfo-01", "4080"
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					    "rv32i_m/privilege/WALLY-minfo-01", "4080",
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					    "rv32i_m/privilege/WALLY-misa-01", "4080"
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 };
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					 };
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 string wally32periph[] = '{
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					 string wally32periph[] = '{
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@ -32,7 +32,8 @@ rv32i_sc_tests = \
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    WALLY-PMP \
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					    WALLY-PMP \
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    WALLY-CSR-permission-s-01 \
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					    WALLY-CSR-permission-s-01 \
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    WALLY-CSR-permission-u-01 \
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					    WALLY-CSR-permission-u-01 \
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    WALLY-minfo-01
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					    WALLY-minfo-01 \
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					    WALLY-misa-01 
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target_tests_nosim = WALLY-PMA \
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					target_tests_nosim = WALLY-PMA \
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												File diff suppressed because it is too large
												Load Diff
											
										
									
								
							@ -0,0 +1,44 @@
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					///////////////////////////////////////////
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					//
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					// WALLY-MMU
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					//
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					// Author: Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
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					//
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					// Created 2022-02-18
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					//
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					// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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					//
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					// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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					// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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					// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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					// is furnished to do so, subject to the following conditions:
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					//
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					// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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					//
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					// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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					// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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					// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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					// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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					///////////////////////////////////////////
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					#include "WALLY-TEST-LIB-32.h"
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					INIT_TESTS
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					s_file_begin:
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					// Test 5.3.2.2: Machine ISA register test
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					// Misa is a specific case *** so I don't want to add a whole test case for reading nonzero but unkown value CSRs.
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					csrr x30, misa // should not cause a fault in machine mode. *** not writing to output because MISA is different for different configs.
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					li x7, 0x111 // success value for read of nonzero misa 
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					bnez x30, misa_nonzero
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					li x7, 0xbad // misa was zero, store bad value
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					misa_nonzero:
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					sw x7, 0(x6)
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					addi x6, x6, 4
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					addi x16, x16, 4
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					END_TESTS
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					TEST_STACK_AND_DATA
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@ -33,7 +33,8 @@ rv64i_sc_tests = \
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    WALLY-PMP \
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					    WALLY-PMP \
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    WALLY-minfo-01 \
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					    WALLY-minfo-01 \
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    WALLY-CSR-permission-s-01 \
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					    WALLY-CSR-permission-s-01 \
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    WALLY-CSR-permission-u-01
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					    WALLY-CSR-permission-u-01 \
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					    WALLY-misa-01
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target_tests_nosim = WALLY-PMA \
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					target_tests_nosim = WALLY-PMA \
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												File diff suppressed because it is too large
												Load Diff
											
										
									
								
							@ -0,0 +1,44 @@
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					///////////////////////////////////////////
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					//
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					// WALLY-MMU
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					//
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					// Author: Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
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					//
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					// Created 2022-02-18
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					//
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					// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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					//
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					// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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					// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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					// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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					// is furnished to do so, subject to the following conditions:
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					//
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					// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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					//
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					// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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					// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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					// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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					// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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					///////////////////////////////////////////
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					#include "WALLY-TEST-LIB-64.h"
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					INIT_TESTS
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					s_file_begin:
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					// Test 5.3.2.2: Machine ISA register test
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					// Misa is a specific case *** so I don't want to add a whole test case for reading nonzero but unkown value CSRs.
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					csrr x30, misa // should not cause a fault in machine mode. *** not writing to output because MISA is different for different configs.
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					li x7, 0x111 // success value for read of nonzero misa 
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					bnez x30, misa_nonzero
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					li x7, 0xbad // misa was zero, store bad value
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					misa_nonzero:
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					sd x7, 0(x6)
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					addi x6, x6, 8
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					addi x16, x16, 8
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					END_TESTS
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					TEST_STACK_AND_DATA
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