forked from Github_Repos/cvw
Start of IFU cleanup
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@ -250,14 +250,12 @@ module ifu (
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.HRESPRam(), .HREADYRam());
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-----/\----- EXCLUDED -----/\----- */
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assign FinalInstrRawF = FinalInstrRawF_FIXME[31:0];
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assign FinalInstrRawF = FinalInstrRawF_FIXME[31:0];
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assign BusStall = 0;
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assign IFUBusRead = 0;
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assign ICacheBusAck = 0;
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assign SelUncachedAdr = 0;
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assign IFUBusAdr = 0;
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end else begin : bus
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genvar index;
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for (index = 0; index < WORDSPERLINE; index++) begin:fetchbuffer
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@ -381,10 +379,7 @@ module ifu (
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.s(`MEM_IROM ? reset : reset_q),
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.y(UnalignedPCNextF));
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flop #(1) resetReg (.clk(clk),
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.d(reset),
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.q(reset_q));
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flop #(1) resetReg (.clk(clk), .d(reset),.q(reset_q)); // delay reset
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flopenrc #(1) BPPredWrongMReg(.clk, .reset, .en(~StallM), .clear(FlushM),
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.d(BPPredWrongE), .q(BPPredWrongM));
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