forked from Github_Repos/cvw
Reset mtimecmp in clint
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@ -60,7 +60,7 @@ module clint (
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flopr #(16) entrydflop(HCLK, ~HRESETn, entry, entryd);
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assign HRESPCLINT = 0; // OK
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assign HREADYCLINT = 1'b1; // *** needs to depend on DONE during accesses
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assign HREADYCLINT = 1'b1; // *** needs to depend on DONE during asynchronous MTIME accesses
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// word aligned reads
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if (`XLEN==64) assign #2 entry = {HADDR[15:3], 3'b000};
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@ -87,8 +87,7 @@ module clint (
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always_ff @(posedge HCLK or negedge HRESETn)
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if (~HRESETn) begin
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MSIP <= 0;
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MTIMECMP <= 0;
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// MTIMECMP is not reset
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MTIMECMP <= 0xFFFFFFFFFFFFFFFF; // Spec says MTIMECMP is not reset, but we reset to maximum value to prevent spurious timer interrupts
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end else if (memwrite) begin
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if (entryd == 16'h0000) MSIP <= HWDATA[0];
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if (entryd == 16'h4000) begin
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@ -104,7 +103,6 @@ module clint (
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always_ff @(posedge HCLK or negedge HRESETn)
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if (~HRESETn) begin
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MTIME <= 0;
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// MTIMECMP is not reset
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end else if (memwrite & entryd == 16'hBFF8) begin
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// MTIME Counter. Eventually change this to run off separate clock. Synchronization then needed
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for(j=0;j<`XLEN/8;j++)
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