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busybear: add bootram section in the same manner as ram

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This commit is contained in:
Noah Boorstin 2021-02-24 02:02:28 +00:00
parent a24270c4ca
commit c8e9edcc43
1 changed files with 18 additions and 2 deletions
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20
wally-pipelined/testbench/testbench-busybear.sv
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@ -165,10 +165,11 @@ module testbench_busybear();
endgenerate
logic [`XLEN-1:0] RAM[('h8000000 >> 3):0];
logic [`XLEN-1:0] bootram[('h2000 >> 3):0];
logic [`XLEN-1:0] readRAM, readPC;
integer RAMAdr, RAMPC;
assign RAMAdr = (HADDR - 'h80000000) >> 3;
assign RAMPC = (PCF - 'h80000000) >> 3;
assign RAMAdr = (HADDR - (HADDR > 'h2fff ? 'h80000000 : 'h1000)) >> 3;
assign RAMPC = (PCF - (PCF > 'h2fff ? 'h80000000 : 'h1000)) >> 3;
logic [63:0] readMask;
assign readMask = ((1 << (8*(1 << HSIZE))) - 1) << 8 * HADDR[2:0];
always @(HWDATA or HADDR or HSIZE or HWRITE or dut.hart.MemRWM[1]) begin
@ -185,6 +186,21 @@ module testbench_busybear();
readPC = RAM[RAMPC];
end
end
// there's almost certianly a better way than just copying this, but its simple enough for now:
always @(HWDATA or HADDR or HSIZE or HWRITE or dut.hart.MemRWM[1]) begin
if ((HWRITE || dut.hart.MemRWM[1]) && (HADDR >= 'h1000 && HADDR <= 'h2FFF)) begin
if (HWRITE) begin
bootram[RAMAdr] = (bootram[RAMAdr] & (~readMask)) | ((HWDATA << 8 * HADDR[2:0]) & readMask);
end else begin
readRAM = bootram[RAMAdr] & readMask;
end
end
end
always @(PCF) begin
if (PCF >= 'h1000 && PCF <= 'h2FFF) begin
readPC = bootram[RAMPC];
end
end
logic [`XLEN-1:0] readAdrExpected;
// this might need to change