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Added coverage tests to regression coverage

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This commit is contained in:
David Harris 2023-03-22 13:00:10 -07:00
parent c7aa602b01
commit c1adc09da0
4 changed files with 32 additions and 25 deletions
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3
sim/regression-wally
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@ -130,8 +130,7 @@ for test in ahbTests:
tests64gc = ["arch64f", "arch64d", "arch64i", "arch64priv", "arch64c", "arch64m", "arch64zi", "wally64a", "wally64periph", "wally64priv"]
if (coverage): # delete all but 64gc tests when running coverage
configs = []
tests64gc = ["arch64f", "arch64d", "arch64i", "arch64priv", "arch64c", "arch64m", "arch64zi", "wally64a", "wally64periph", "wally64priv", "imperas64f", "imperas64d", "imperas64c", "imperas64i"]
# tests64gc.append(["imperas64f", "imperas64d", "imperas64c", "imperas64i"])
tests64gc = ["coverage64gc", "arch64f", "arch64d", "arch64i", "arch64priv", "arch64c", "arch64m", "arch64zi", "wally64a", "wally64periph", "wally64priv", "imperas64f", "imperas64d", "imperas64c", "imperas64i"]
coverStr = '-coverage'
else:
coverStr = ''

31
testbench/testbench.sv
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@ -106,6 +106,7 @@ logic [3:0] dummy;
"coremark": tests = coremark;
"fpga": tests = fpga;
"ahb" : tests = ahb;
"coverage64gc" : tests = coverage64gc;
endcase
end else begin // RV32
case (TEST)
@ -299,20 +300,22 @@ logic [3:0] dummy;
testadrNoBase = (begin_signature_addr - `UNCORE_RAM_BASE)/(`XLEN/8);
#600; // give time for instructions in pipeline to finish
if (TEST == "embench") begin
// Writes contents of begin_signature to .sim.output file
// this contains instret and cycles for start and end of test run, used by embench python speed script to calculate embench speed score
// also begin_signature contains the results of the self checking mechanism, which will be read by the python script for error checking
$display("Embench Benchmark: %s is done.", tests[test]);
if (riscofTest) outputfile = {pathname, tests[test], "/ref/ref.sim.output"};
else outputfile = {pathname, tests[test], ".sim.output"};
outputFilePointer = $fopen(outputfile);
i = 0;
while ($unsigned(i) < $unsigned(5'd5)) begin
$fdisplayh(outputFilePointer, DCacheFlushFSM.ShadowRAM[testadr+i]);
i = i + 1;
end
$fclose(outputFilePointer);
$display("Embench Benchmark: created output file: %s", outputfile);
// Writes contents of begin_signature to .sim.output file
// this contains instret and cycles for start and end of test run, used by embench python speed script to calculate embench speed score
// also begin_signature contains the results of the self checking mechanism, which will be read by the python script for error checking
$display("Embench Benchmark: %s is done.", tests[test]);
if (riscofTest) outputfile = {pathname, tests[test], "/ref/ref.sim.output"};
else outputfile = {pathname, tests[test], ".sim.output"};
outputFilePointer = $fopen(outputfile);
i = 0;
while ($unsigned(i) < $unsigned(5'd5)) begin
$fdisplayh(outputFilePointer, DCacheFlushFSM.ShadowRAM[testadr+i]);
i = i + 1;
end
$fclose(outputFilePointer);
$display("Embench Benchmark: created output file: %s", outputfile);
end else if (TEST == "coverage64gc") begin
$display("Coverage tests don't get checked");
end else begin
// for tests with no self checking mechanism, read .signature.output file and compare to check for errors
// clear signature to prevent contamination from previous tests

18
testbench/tests.vh
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@ -27,22 +27,26 @@
`define IMPERASTEST "0"
`define RISCVARCHTEST "1"
`define WALLYTEST "2"
`define MYIMPERASTEST "3"
`define COREMARK "4"
`define EMBENCH "5"
`define CUSTOM "6"
// *** remove MYIMPERASTEST cases when ported
`define COREMARK "3"
`define EMBENCH "4"
`define CUSTOM "5"
`define COVERAGE "6"
string tvpaths[] = '{
"$RISCV/imperas-riscv-tests/work/",
"../tests/riscof/work/riscv-arch-test/",
"../tests/riscof/work/wally-riscv-arch-test/",
"../tests/imperas-riscv-tests/work/",
"../benchmarks/coremark/work/",
"../addins/embench-iot/",
"../tests/custom/work/"
"../tests/custom/work/",
"../tests/coverage/"
};
string coverage64gc[] = '{
`COVERAGE,
"badinstr"
};
string coremark[] = '{
`COREMARK,
"coremark.bare.riscv"

5
tests/coverage/Makefile
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@ -16,11 +16,12 @@ all: $(OBJECTS)
%.elf.objdump: %.elf
%.elf: $(SRCDIR)/%.$(SEXT) WALLY-init-lib.h Makefile
# Change many things if bit width isn't 64
echo $@
riscv64-unknown-elf-gcc -g -o $@ -march=rv64gc -mabi=lp64 -mcmodel=medany \
-nostartfiles -T../../examples/link/link.ld $<
riscv64-unknown-elf-objdump -D $@ > $@.objdump
riscv64-unknown-elf-elf2hex --bit-width $(if $(findstring rv64,$*),64,32) --input $@ --output $@.memfile
riscv64-unknown-elf-elf2hex --bit-width 64 --input $@ --output $@.memfile
extractFunctionRadix.sh $@.objdump
sim: %.elf
@ -29,7 +30,7 @@ sim: %.elf
echo "Signature matches! Success!"
clean:
rm -f *.elf *.objdump *.signature.output
rm -f *.elf *.objdump *.signature.output *.addr *.lab *.memfile