forked from Github_Repos/cvw
Updated wave file.
This commit is contained in:
Ross Thompson
parent
46bce70e42
commit
b3bf04d474
@ -13,41 +13,41 @@ add wave -noupdate -expand -group {Memory Stage} /testbench/dut/hart/PCM
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add wave -noupdate -expand -group {Memory Stage} /testbench/InstrMName
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add wave -noupdate -expand -group {Memory Stage} /testbench/dut/hart/InstrM
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add wave -noupdate -expand -group {Memory Stage} /testbench/dut/hart/lsu/MemAdrM
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add wave -noupdate -expand -group HDU -expand -group traps /testbench/dut/hart/priv/trap/InstrMisalignedFaultM
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add wave -noupdate -expand -group HDU -expand -group traps /testbench/dut/hart/priv/trap/InstrAccessFaultM
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add wave -noupdate -expand -group HDU -expand -group traps /testbench/dut/hart/priv/trap/IllegalInstrFaultM
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add wave -noupdate -expand -group HDU -expand -group traps /testbench/dut/hart/priv/trap/BreakpointFaultM
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add wave -noupdate -expand -group HDU -expand -group traps /testbench/dut/hart/priv/trap/LoadMisalignedFaultM
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add wave -noupdate -expand -group HDU -expand -group traps /testbench/dut/hart/priv/trap/StoreMisalignedFaultM
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add wave -noupdate -expand -group HDU -expand -group traps /testbench/dut/hart/priv/trap/LoadAccessFaultM
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add wave -noupdate -expand -group HDU -expand -group traps /testbench/dut/hart/priv/trap/StoreAccessFaultM
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add wave -noupdate -expand -group HDU -expand -group traps /testbench/dut/hart/priv/trap/EcallFaultM
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add wave -noupdate -expand -group HDU -expand -group traps /testbench/dut/hart/priv/trap/InstrPageFaultM
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add wave -noupdate -expand -group HDU -expand -group traps /testbench/dut/hart/priv/trap/LoadPageFaultM
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add wave -noupdate -expand -group HDU -expand -group traps /testbench/dut/hart/priv/trap/StorePageFaultM
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add wave -noupdate -expand -group HDU -expand -group traps /testbench/dut/hart/priv/trap/InterruptM
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add wave -noupdate -expand -group HDU -group interrupts /testbench/dut/hart/priv/trap/PendingIntsM
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add wave -noupdate -expand -group HDU -group interrupts /testbench/dut/hart/priv/trap/CommittedM
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add wave -noupdate -expand -group HDU -group interrupts /testbench/dut/hart/priv/trap/InstrValidM
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add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/BPPredWrongE
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add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/CSRWritePendingDEM
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add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/RetM
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add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/TrapM
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add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/LoadStallD
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add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/StoreStallD
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add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/ICacheStallF
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add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/LSUStall
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add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/MulDivStallD
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add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/hzu/FlushF
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add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushD
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add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushE
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add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushM
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add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushW
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add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallF
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add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallD
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add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallE
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add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallM
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add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallW
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/InstrMisalignedFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/InstrAccessFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/IllegalInstrFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/BreakpointFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/LoadMisalignedFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/StoreMisalignedFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/LoadAccessFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/StoreAccessFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/EcallFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/InstrPageFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/LoadPageFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/StorePageFaultM
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add wave -noupdate -group HDU -expand -group traps /testbench/dut/hart/priv/trap/InterruptM
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add wave -noupdate -group HDU -group interrupts /testbench/dut/hart/priv/trap/PendingIntsM
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add wave -noupdate -group HDU -group interrupts /testbench/dut/hart/priv/trap/CommittedM
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add wave -noupdate -group HDU -group interrupts /testbench/dut/hart/priv/trap/InstrValidM
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add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/BPPredWrongE
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add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/CSRWritePendingDEM
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add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/RetM
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add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/TrapM
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add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/LoadStallD
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add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/StoreStallD
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add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/ICacheStallF
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add wave -noupdate -group HDU -group hazards /testbench/dut/hart/hzu/LSUStall
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add wave -noupdate -group HDU -group hazards /testbench/dut/hart/MulDivStallD
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add wave -noupdate -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/hzu/FlushF
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add wave -noupdate -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushD
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add wave -noupdate -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushE
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add wave -noupdate -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushM
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add wave -noupdate -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushW
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add wave -noupdate -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallF
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add wave -noupdate -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallD
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add wave -noupdate -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallE
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add wave -noupdate -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallM
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add wave -noupdate -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallW
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add wave -noupdate -group Bpred -color Orange /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/GHR
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add wave -noupdate -group Bpred -expand -group {branch update selection inputs} /testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/BPPredF
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add wave -noupdate -group Bpred -expand -group {branch update selection inputs} {/testbench/dut/hart/ifu/bpred/bpred/Predictor/DirPredictor/InstrClassE[0]}
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@ -182,43 +182,43 @@ add wave -noupdate -group divider /testbench/dut/hart/mdu/genblk1/div/N
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add wave -noupdate -group divider /testbench/dut/hart/mdu/genblk1/div/D
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add wave -noupdate -group divider /testbench/dut/hart/mdu/genblk1/div/Q
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add wave -noupdate -group divider /testbench/dut/hart/mdu/genblk1/div/rem0
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add wave -noupdate -group icache -color Orange /testbench/dut/hart/ifu/icache/controller/CurrState
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add wave -noupdate -group icache /testbench/dut/hart/ifu/icache/controller/NextState
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add wave -noupdate -group icache /testbench/dut/hart/ifu/ITLBMissF
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add wave -noupdate -group icache /testbench/dut/hart/ifu/icache/ITLBWriteF
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add wave -noupdate -group icache -group {tag read} /testbench/dut/hart/ifu/icache/cachemem/DataValidBit
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add wave -noupdate -group icache -group {tag read} /testbench/dut/hart/ifu/icache/cachemem/cachetags/ReadData
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/hit
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/spill
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/ICacheStallF
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/SavePC
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/spillSave
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/UnalignedSelect
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/PCMux
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/spillSave
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/CntReset
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/PreCntEn
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add wave -noupdate -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/CntEn
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add wave -noupdate -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/NUMLINES
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add wave -noupdate -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/BLOCKLEN
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add wave -noupdate -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/BLOCKBYTELEN
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add wave -noupdate -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/OFFSETLEN
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add wave -noupdate -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/INDEXLEN
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add wave -noupdate -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/TAGLEN
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add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/FetchCountFlag
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add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/FetchCount
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add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/InstrPAdrF
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add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/InstrReadF
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add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/InstrAckF
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add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/InstrInF
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add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/ICacheMemWriteEnable
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add wave -noupdate -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/ICacheMemWriteData
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add wave -noupdate -group icache -expand -group memory -group {tag write} /testbench/dut/hart/ifu/icache/cachemem/WriteEnable
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add wave -noupdate -group icache -expand -group memory -group {tag write} /testbench/dut/hart/ifu/icache/cachemem/WriteLine
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add wave -noupdate -group icache -expand -group memory -group {tag write} /testbench/dut/hart/ifu/icache/cachemem/cachetags/StoredData
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add wave -noupdate -group icache -expand -group {instr to cpu} /testbench/dut/hart/ifu/icache/controller/FinalInstrRawF
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add wave -noupdate -group icache -expand -group pc /testbench/dut/hart/ifu/icache/controller/PCPF
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add wave -noupdate -group icache -expand -group pc /testbench/dut/hart/ifu/icache/controller/PCPreFinalF
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add wave -noupdate -expand -group icache -color Orange /testbench/dut/hart/ifu/icache/controller/CurrState
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add wave -noupdate -expand -group icache /testbench/dut/hart/ifu/icache/controller/NextState
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add wave -noupdate -expand -group icache /testbench/dut/hart/ifu/ITLBMissF
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add wave -noupdate -expand -group icache /testbench/dut/hart/ifu/icache/ITLBWriteF
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add wave -noupdate -expand -group icache -group {tag read} /testbench/dut/hart/ifu/icache/cachemem/DataValidBit
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add wave -noupdate -expand -group icache -group {tag read} /testbench/dut/hart/ifu/icache/cachemem/cachetags/ReadData
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add wave -noupdate -expand -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/hit
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add wave -noupdate -expand -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/spill
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add wave -noupdate -expand -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/ICacheStallF
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add wave -noupdate -expand -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/SavePC
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add wave -noupdate -expand -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/spillSave
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add wave -noupdate -expand -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/UnalignedSelect
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add wave -noupdate -expand -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/PCMux
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add wave -noupdate -expand -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/spillSave
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add wave -noupdate -expand -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/CntReset
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add wave -noupdate -expand -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/PreCntEn
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add wave -noupdate -expand -group icache -group {fsm out and control} /testbench/dut/hart/ifu/icache/controller/CntEn
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add wave -noupdate -expand -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/NUMLINES
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add wave -noupdate -expand -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/BLOCKLEN
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add wave -noupdate -expand -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/BLOCKBYTELEN
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add wave -noupdate -expand -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/OFFSETLEN
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add wave -noupdate -expand -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/INDEXLEN
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add wave -noupdate -expand -group icache -group {icache parameters} -radix unsigned /testbench/dut/hart/ifu/icache/cachemem/TAGLEN
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add wave -noupdate -expand -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/FetchCountFlag
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add wave -noupdate -expand -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/FetchCount
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add wave -noupdate -expand -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/InstrPAdrF
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add wave -noupdate -expand -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/InstrReadF
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add wave -noupdate -expand -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/InstrAckF
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add wave -noupdate -expand -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/InstrInF
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add wave -noupdate -expand -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/ICacheMemWriteEnable
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add wave -noupdate -expand -group icache -expand -group memory /testbench/dut/hart/ifu/icache/controller/ICacheMemWriteData
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add wave -noupdate -expand -group icache -expand -group memory -group {tag write} /testbench/dut/hart/ifu/icache/cachemem/WriteEnable
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add wave -noupdate -expand -group icache -expand -group memory -group {tag write} /testbench/dut/hart/ifu/icache/cachemem/WriteLine
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add wave -noupdate -expand -group icache -expand -group memory -group {tag write} /testbench/dut/hart/ifu/icache/cachemem/cachetags/StoredData
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add wave -noupdate -expand -group icache -expand -group {instr to cpu} /testbench/dut/hart/ifu/icache/controller/FinalInstrRawF
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add wave -noupdate -expand -group icache -expand -group pc /testbench/dut/hart/ifu/icache/controller/PCPF
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add wave -noupdate -expand -group icache -expand -group pc /testbench/dut/hart/ifu/icache/controller/PCPreFinalF
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add wave -noupdate -group AHB -color Gold /testbench/dut/hart/ebu/BusState
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add wave -noupdate -group AHB /testbench/dut/hart/ebu/NextBusState
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add wave -noupdate -group AHB -expand -group {input requests} /testbench/dut/hart/ebu/AtomicMaskedM
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@ -241,122 +241,122 @@ add wave -noupdate -group AHB /testbench/dut/hart/ebu/HADDRD
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add wave -noupdate -group AHB /testbench/dut/hart/ebu/HSIZED
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add wave -noupdate -group AHB /testbench/dut/hart/ebu/HWRITED
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add wave -noupdate -group AHB /testbench/dut/hart/ebu/StallW
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add wave -noupdate -expand -group lsu -expand -group {LSU ARB} /testbench/dut/hart/lsu/arbiter/SelPTW
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add wave -noupdate -expand -group lsu -expand -group dcache -color Gold /testbench/dut/hart/lsu/dcache/CurrState
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add wave -noupdate -expand -group lsu -expand -group dcache /testbench/dut/hart/lsu/dcache/WalkerPageFaultM
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add wave -noupdate -expand -group lsu -expand -group dcache /testbench/dut/hart/lsu/dcache/WriteDataM
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add wave -noupdate -expand -group lsu -expand -group dcache /testbench/dut/hart/lsu/dcache/SRAMBlockWriteEnableM
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add wave -noupdate -expand -group lsu -expand -group dcache /testbench/dut/hart/lsu/dcache/SRAMWordWriteEnableM
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add wave -noupdate -expand -group lsu -expand -group dcache /testbench/dut/hart/lsu/dcache/SRAMWayWriteEnable
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add wave -noupdate -expand -group lsu -expand -group dcache /testbench/dut/hart/lsu/dcache/SRAMWordEnable
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add wave -noupdate -expand -group lsu -expand -group dcache /testbench/dut/hart/lsu/dcache/SelAdrM
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add wave -noupdate -expand -group lsu -expand -group dcache /testbench/dut/hart/lsu/dcache/DCacheMemWriteData
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add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/WriteEnable}
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add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/SetValid}
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add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/SetDirty}
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add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/Adr}
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add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/WAdr}
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add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 -label TAG {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/CacheTagMem/StoredData}
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/DirtyBits}
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/ValidBits}
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[0]/CacheDataMem/StoredData}
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[0]/CacheDataMem/WriteEnable}
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word1 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[1]/CacheDataMem/StoredData}
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word1 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[1]/CacheDataMem/WriteEnable}
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word2 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[2]/CacheDataMem/WriteEnable}
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word2 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[2]/CacheDataMem/StoredData}
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word3 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[3]/CacheDataMem/WriteEnable}
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word3 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[3]/CacheDataMem/StoredData}
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/SRAMAdr
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/ReadDataBlockWayM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/ReadDataBlockWayMaskedM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/ReadDataBlockM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/ReadDataWordM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/FinalReadDataWordM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/ReadTag
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/WayHit
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/Dirty
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/Valid
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group Victim /testbench/dut/hart/lsu/dcache/VictimReadDataBLockWayMaskedM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group Victim /testbench/dut/hart/lsu/dcache/VictimReadDataBlockM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group Victim /testbench/dut/hart/lsu/dcache/VictimTag
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group Victim /testbench/dut/hart/lsu/dcache/VictimWay
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group Victim /testbench/dut/hart/lsu/dcache/VictimDirtyWay
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group Victim /testbench/dut/hart/lsu/dcache/VictimDirty
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/MemRWM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/MemAdrE
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/MemPAdrM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/pagetablewalker/DTLBMissM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/pagetablewalker/MemAdrM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/Funct3M
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/Funct7M
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/AtomicM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/CacheableM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/WriteDataM
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/ReadDataW
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/DCacheStall
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -group status /testbench/dut/hart/lsu/dcache/WayHit
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -group status -color {Medium Orchid} /testbench/dut/hart/lsu/dcache/CacheHit
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -group status /testbench/dut/hart/lsu/dcache/SRAMWordWriteEnableW
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Memory Side} /testbench/dut/hart/lsu/dcache/AHBPAdr
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Memory Side} /testbench/dut/hart/lsu/dcache/AHBRead
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Memory Side} /testbench/dut/hart/lsu/dcache/AHBWrite
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Memory Side} /testbench/dut/hart/lsu/dcache/AHBAck
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Memory Side} /testbench/dut/hart/lsu/dcache/HRDATA
|
||||
add wave -noupdate -expand -group lsu -expand -group dcache -expand -group {Memory Side} /testbench/dut/hart/lsu/dcache/HWDATA
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb /testbench/dut/hart/lsu/dmmu/genblk1/tlb/tlbcontrol/EffectivePrivilegeMode
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb /testbench/dut/hart/lsu/dmmu/genblk1/tlb/tlbcontrol/Translate
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb /testbench/dut/hart/lsu/dmmu/genblk1/tlb/tlbcontrol/DisableTranslation
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb /testbench/dut/hart/lsu/dmmu/TLBMiss
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb /testbench/dut/hart/lsu/dmmu/TLBHit
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb /testbench/dut/hart/lsu/dmmu/PhysicalAddress
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb -label {Virtual Address} /testbench/dut/hart/lsu/dmmu/Address
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb -expand -group faults /testbench/dut/hart/lsu/dmmu/TLBPageFault
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb -expand -group faults /testbench/dut/hart/lsu/dmmu/LoadAccessFaultM
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb -expand -group faults /testbench/dut/hart/lsu/dmmu/StoreAccessFaultM
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb /testbench/dut/hart/lsu/dmmu/genblk1/tlb/TLBPAdr
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb -expand -group write /testbench/dut/hart/lsu/dmmu/genblk1/tlb/Address
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb -expand -group write /testbench/dut/hart/lsu/dmmu/genblk1/tlb/PTE
|
||||
add wave -noupdate -expand -group lsu -expand -group dtlb -expand -group write /testbench/dut/hart/lsu/dmmu/genblk1/tlb/TLBWrite
|
||||
add wave -noupdate -expand -group lsu -expand -group pma /testbench/dut/hart/lsu/dmmu/pmachecker/PhysicalAddress
|
||||
add wave -noupdate -expand -group lsu -expand -group pma /testbench/dut/hart/lsu/dmmu/pmachecker/SelRegions
|
||||
add wave -noupdate -expand -group lsu -expand -group pma /testbench/dut/hart/lsu/dmmu/Cacheable
|
||||
add wave -noupdate -expand -group lsu -expand -group pma /testbench/dut/hart/lsu/dmmu/Idempotent
|
||||
add wave -noupdate -expand -group lsu -expand -group pma /testbench/dut/hart/lsu/dmmu/AtomicAllowed
|
||||
add wave -noupdate -expand -group lsu -expand -group pma /testbench/dut/hart/lsu/dmmu/pmachecker/PMAAccessFault
|
||||
add wave -noupdate -expand -group lsu -expand -group pma /testbench/dut/hart/lsu/dmmu/PMAInstrAccessFaultF
|
||||
add wave -noupdate -expand -group lsu -expand -group pma /testbench/dut/hart/lsu/dmmu/PMALoadAccessFaultM
|
||||
add wave -noupdate -expand -group lsu -expand -group pma /testbench/dut/hart/lsu/dmmu/PMAStoreAccessFaultM
|
||||
add wave -noupdate -expand -group lsu -expand -group pmp /testbench/dut/hart/lsu/dmmu/PMPInstrAccessFaultF
|
||||
add wave -noupdate -expand -group lsu -expand -group pmp /testbench/dut/hart/lsu/dmmu/PMPLoadAccessFaultM
|
||||
add wave -noupdate -expand -group lsu -expand -group pmp /testbench/dut/hart/lsu/dmmu/PMPStoreAccessFaultM
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -color Gold /testbench/dut/hart/lsu/pagetablewalker/genblk1/WalkerState
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker /testbench/dut/hart/lsu/pagetablewalker/genblk1/EndWalk
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker /testbench/dut/hart/lsu/pagetablewalker/genblk1/PreviousWalkerState
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -color Salmon /testbench/dut/hart/lsu/pagetablewalker/HPTWStall
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker /testbench/dut/hart/lsu/pagetablewalker/HPTWReadPTE
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker /testbench/dut/hart/lsu/pagetablewalker/genblk1/CurrentPTE
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group miss/write /testbench/dut/hart/lsu/pagetablewalker/ITLBMissF
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group miss/write /testbench/dut/hart/lsu/pagetablewalker/ITLBWriteF
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group miss/write /testbench/dut/hart/lsu/pagetablewalker/DTLBMissM
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group miss/write /testbench/dut/hart/lsu/pagetablewalker/DTLBWriteM
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/PageTableEntryF
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/PageTableEntryM
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/PageTypeF
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/PageTypeM
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/genblk1/CurrentPTE
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/HPTWPAdrE
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/HPTWPAdrM
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/HPTWRead
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -divider data
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -group {fsm outputs} /testbench/dut/hart/lsu/pagetablewalker/ITLBWriteF
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -group {fsm outputs} /testbench/dut/hart/lsu/pagetablewalker/DTLBWriteM
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -group {fsm outputs} /testbench/dut/hart/lsu/pagetablewalker/WalkerInstrPageFaultF
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -group {fsm outputs} /testbench/dut/hart/lsu/pagetablewalker/WalkerLoadPageFaultM
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -group {fsm outputs} /testbench/dut/hart/lsu/pagetablewalker/WalkerStorePageFaultM
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/hart/lsu/pagetablewalker/WalkerStorePageFaultM
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/hart/lsu/pagetablewalker/WalkerLoadPageFaultM
|
||||
add wave -noupdate -expand -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/hart/lsu/pagetablewalker/WalkerInstrPageFaultF
|
||||
add wave -noupdate -group lsu -expand -group {LSU ARB} /testbench/dut/hart/lsu/arbiter/SelPTW
|
||||
add wave -noupdate -group lsu -group dcache -color Gold /testbench/dut/hart/lsu/dcache/CurrState
|
||||
add wave -noupdate -group lsu -group dcache /testbench/dut/hart/lsu/dcache/WalkerPageFaultM
|
||||
add wave -noupdate -group lsu -group dcache /testbench/dut/hart/lsu/dcache/WriteDataM
|
||||
add wave -noupdate -group lsu -group dcache /testbench/dut/hart/lsu/dcache/SRAMBlockWriteEnableM
|
||||
add wave -noupdate -group lsu -group dcache /testbench/dut/hart/lsu/dcache/SRAMWordWriteEnableM
|
||||
add wave -noupdate -group lsu -group dcache /testbench/dut/hart/lsu/dcache/SRAMWayWriteEnable
|
||||
add wave -noupdate -group lsu -group dcache /testbench/dut/hart/lsu/dcache/SRAMWordEnable
|
||||
add wave -noupdate -group lsu -group dcache /testbench/dut/hart/lsu/dcache/SelAdrM
|
||||
add wave -noupdate -group lsu -group dcache /testbench/dut/hart/lsu/dcache/DCacheMemWriteData
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/WriteEnable}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/SetValid}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/SetDirty}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/Adr}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/WAdr}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 -label TAG {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/CacheTagMem/StoredData}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/DirtyBits}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/ValidBits}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[0]/CacheDataMem/StoredData}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word0 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[0]/CacheDataMem/WriteEnable}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word1 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[1]/CacheDataMem/StoredData}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word1 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[1]/CacheDataMem/WriteEnable}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word2 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[2]/CacheDataMem/WriteEnable}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word2 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[2]/CacheDataMem/StoredData}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word3 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[3]/CacheDataMem/WriteEnable}
|
||||
add wave -noupdate -group lsu -group dcache -group {Cache SRAM writes} -expand -group way0 -expand -group Way0Word3 {/testbench/dut/hart/lsu/dcache/CacheWays[0]/MemWay/word[3]/CacheDataMem/StoredData}
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/SRAMAdr
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/ReadDataBlockWayM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/ReadDataBlockWayMaskedM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/ReadDataBlockM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/ReadDataWordM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/FinalReadDataWordM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/ReadTag
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/WayHit
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/Dirty
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Cache SRAM read} /testbench/dut/hart/lsu/dcache/Valid
|
||||
add wave -noupdate -group lsu -group dcache -expand -group Victim /testbench/dut/hart/lsu/dcache/VictimReadDataBLockWayMaskedM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group Victim /testbench/dut/hart/lsu/dcache/VictimReadDataBlockM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group Victim /testbench/dut/hart/lsu/dcache/VictimTag
|
||||
add wave -noupdate -group lsu -group dcache -expand -group Victim /testbench/dut/hart/lsu/dcache/VictimWay
|
||||
add wave -noupdate -group lsu -group dcache -expand -group Victim /testbench/dut/hart/lsu/dcache/VictimDirtyWay
|
||||
add wave -noupdate -group lsu -group dcache -expand -group Victim /testbench/dut/hart/lsu/dcache/VictimDirty
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/MemRWM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/MemAdrE
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/MemPAdrM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/pagetablewalker/DTLBMissM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/pagetablewalker/MemAdrM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/Funct3M
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/Funct7M
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/AtomicM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/CacheableM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/WriteDataM
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/ReadDataW
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {CPU side} /testbench/dut/hart/lsu/dcache/DCacheStall
|
||||
add wave -noupdate -group lsu -group dcache -group status /testbench/dut/hart/lsu/dcache/WayHit
|
||||
add wave -noupdate -group lsu -group dcache -group status -color {Medium Orchid} /testbench/dut/hart/lsu/dcache/CacheHit
|
||||
add wave -noupdate -group lsu -group dcache -group status /testbench/dut/hart/lsu/dcache/SRAMWordWriteEnableW
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Memory Side} /testbench/dut/hart/lsu/dcache/AHBPAdr
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Memory Side} /testbench/dut/hart/lsu/dcache/AHBRead
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Memory Side} /testbench/dut/hart/lsu/dcache/AHBWrite
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Memory Side} /testbench/dut/hart/lsu/dcache/AHBAck
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Memory Side} /testbench/dut/hart/lsu/dcache/HRDATA
|
||||
add wave -noupdate -group lsu -group dcache -expand -group {Memory Side} /testbench/dut/hart/lsu/dcache/HWDATA
|
||||
add wave -noupdate -group lsu -group dtlb /testbench/dut/hart/lsu/dmmu/genblk1/tlb/tlbcontrol/EffectivePrivilegeMode
|
||||
add wave -noupdate -group lsu -group dtlb /testbench/dut/hart/lsu/dmmu/genblk1/tlb/tlbcontrol/Translate
|
||||
add wave -noupdate -group lsu -group dtlb /testbench/dut/hart/lsu/dmmu/genblk1/tlb/tlbcontrol/DisableTranslation
|
||||
add wave -noupdate -group lsu -group dtlb /testbench/dut/hart/lsu/dmmu/TLBMiss
|
||||
add wave -noupdate -group lsu -group dtlb /testbench/dut/hart/lsu/dmmu/TLBHit
|
||||
add wave -noupdate -group lsu -group dtlb /testbench/dut/hart/lsu/dmmu/PhysicalAddress
|
||||
add wave -noupdate -group lsu -group dtlb -label {Virtual Address} /testbench/dut/hart/lsu/dmmu/Address
|
||||
add wave -noupdate -group lsu -group dtlb -expand -group faults /testbench/dut/hart/lsu/dmmu/TLBPageFault
|
||||
add wave -noupdate -group lsu -group dtlb -expand -group faults /testbench/dut/hart/lsu/dmmu/LoadAccessFaultM
|
||||
add wave -noupdate -group lsu -group dtlb -expand -group faults /testbench/dut/hart/lsu/dmmu/StoreAccessFaultM
|
||||
add wave -noupdate -group lsu -group dtlb /testbench/dut/hart/lsu/dmmu/genblk1/tlb/TLBPAdr
|
||||
add wave -noupdate -group lsu -group dtlb -expand -group write /testbench/dut/hart/lsu/dmmu/genblk1/tlb/Address
|
||||
add wave -noupdate -group lsu -group dtlb -expand -group write /testbench/dut/hart/lsu/dmmu/genblk1/tlb/PTE
|
||||
add wave -noupdate -group lsu -group dtlb -expand -group write /testbench/dut/hart/lsu/dmmu/genblk1/tlb/TLBWrite
|
||||
add wave -noupdate -group lsu -group pma /testbench/dut/hart/lsu/dmmu/pmachecker/PhysicalAddress
|
||||
add wave -noupdate -group lsu -group pma /testbench/dut/hart/lsu/dmmu/pmachecker/SelRegions
|
||||
add wave -noupdate -group lsu -group pma /testbench/dut/hart/lsu/dmmu/Cacheable
|
||||
add wave -noupdate -group lsu -group pma /testbench/dut/hart/lsu/dmmu/Idempotent
|
||||
add wave -noupdate -group lsu -group pma /testbench/dut/hart/lsu/dmmu/AtomicAllowed
|
||||
add wave -noupdate -group lsu -group pma /testbench/dut/hart/lsu/dmmu/pmachecker/PMAAccessFault
|
||||
add wave -noupdate -group lsu -group pma /testbench/dut/hart/lsu/dmmu/PMAInstrAccessFaultF
|
||||
add wave -noupdate -group lsu -group pma /testbench/dut/hart/lsu/dmmu/PMALoadAccessFaultM
|
||||
add wave -noupdate -group lsu -group pma /testbench/dut/hart/lsu/dmmu/PMAStoreAccessFaultM
|
||||
add wave -noupdate -group lsu -expand -group pmp /testbench/dut/hart/lsu/dmmu/PMPInstrAccessFaultF
|
||||
add wave -noupdate -group lsu -expand -group pmp /testbench/dut/hart/lsu/dmmu/PMPLoadAccessFaultM
|
||||
add wave -noupdate -group lsu -expand -group pmp /testbench/dut/hart/lsu/dmmu/PMPStoreAccessFaultM
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -color Gold /testbench/dut/hart/lsu/pagetablewalker/genblk1/WalkerState
|
||||
add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/hart/lsu/pagetablewalker/genblk1/EndWalk
|
||||
add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/hart/lsu/pagetablewalker/genblk1/PreviousWalkerState
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -color Salmon /testbench/dut/hart/lsu/pagetablewalker/HPTWStall
|
||||
add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/hart/lsu/pagetablewalker/HPTWReadPTE
|
||||
add wave -noupdate -group lsu -expand -group ptwalker /testbench/dut/hart/lsu/pagetablewalker/genblk1/CurrentPTE
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group miss/write /testbench/dut/hart/lsu/pagetablewalker/ITLBMissF
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group miss/write /testbench/dut/hart/lsu/pagetablewalker/ITLBWriteF
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group miss/write /testbench/dut/hart/lsu/pagetablewalker/DTLBMissM
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group miss/write /testbench/dut/hart/lsu/pagetablewalker/DTLBWriteM
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/PageTableEntryF
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/PageTableEntryM
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/PageTypeF
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/PageTypeM
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/genblk1/CurrentPTE
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/HPTWPAdrE
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/HPTWPAdrM
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group pte /testbench/dut/hart/lsu/pagetablewalker/HPTWRead
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -divider data
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -group {fsm outputs} /testbench/dut/hart/lsu/pagetablewalker/ITLBWriteF
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -group {fsm outputs} /testbench/dut/hart/lsu/pagetablewalker/DTLBWriteM
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -group {fsm outputs} /testbench/dut/hart/lsu/pagetablewalker/WalkerInstrPageFaultF
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -group {fsm outputs} /testbench/dut/hart/lsu/pagetablewalker/WalkerLoadPageFaultM
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -group {fsm outputs} /testbench/dut/hart/lsu/pagetablewalker/WalkerStorePageFaultM
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/hart/lsu/pagetablewalker/WalkerStorePageFaultM
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/hart/lsu/pagetablewalker/WalkerLoadPageFaultM
|
||||
add wave -noupdate -group lsu -expand -group ptwalker -expand -group faults /testbench/dut/hart/lsu/pagetablewalker/WalkerInstrPageFaultF
|
||||
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/HCLK
|
||||
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/HSELPLIC
|
||||
add wave -noupdate -group plic /testbench/dut/uncore/genblk2/plic/HADDR
|
||||
@ -421,14 +421,17 @@ add wave -noupdate -group uart -expand -group outputs /testbench/dut/uncore/genb
|
||||
add wave -noupdate -group uart -expand -group outputs /testbench/dut/uncore/genblk4/uart/INTR
|
||||
add wave -noupdate -group uart -expand -group outputs /testbench/dut/uncore/genblk4/uart/TXRDYb
|
||||
add wave -noupdate -group uart -expand -group outputs /testbench/dut/uncore/genblk4/uart/RXRDYb
|
||||
add wave -noupdate -group itlb /testbench/dut/hart/ifu/ITLBMissF
|
||||
add wave -noupdate -expand -group itlb /testbench/dut/hart/ifu/immu/TLBWrite
|
||||
add wave -noupdate -expand -group itlb /testbench/dut/hart/ifu/ITLBMissF
|
||||
add wave -noupdate -expand -group itlb /testbench/dut/hart/ifu/immu/PhysicalAddress
|
||||
add wave -noupdate -expand -group itlb /testbench/dut/hart/ifu/immu/Address
|
||||
add wave -noupdate -group UART /testbench/dut/uncore/genblk4/uart/HCLK
|
||||
add wave -noupdate -group UART /testbench/dut/uncore/genblk4/uart/HSELUART
|
||||
add wave -noupdate -group UART /testbench/dut/uncore/genblk4/uart/HADDR
|
||||
add wave -noupdate -group UART /testbench/dut/uncore/genblk4/uart/HWRITE
|
||||
add wave -noupdate -group UART /testbench/dut/uncore/genblk4/uart/HWDATA
|
||||
TreeUpdate [SetDefaultTree]
|
||||
WaveRestoreCursors {{Cursor 4} {29656 ns} 0} {{Cursor 2} {28907 ns} 0} {{Cursor 3} {27874 ns} 0}
|
||||
WaveRestoreCursors {{Cursor 4} {37704 ns} 0} {{Cursor 2} {28907 ns} 0} {{Cursor 3} {27874 ns} 0}
|
||||
quietly wave cursor active 1
|
||||
configure wave -namecolwidth 250
|
||||
configure wave -valuecolwidth 297
|
||||
@ -444,4 +447,4 @@ configure wave -griddelta 40
|
||||
configure wave -timeline 0
|
||||
configure wave -timelineunits ns
|
||||
update
|
||||
WaveRestoreZoom {29565 ns} {29803 ns}
|
||||
WaveRestoreZoom {37554 ns} {37770 ns}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user