forked from Github_Repos/cvw
Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main
This commit is contained in:
Ross Thompson
commit
a662aa487c
@ -35,14 +35,14 @@ module add(r[105:0], s[105:0], t[157:0], sum[157:0],
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wire [157:0] sum0; // sum of compound adder +0 mode
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wire [157:0] sum1; // sum of compound adder +1 mode
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// Invert addend if necessary
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// Invert addend if z's sign is diffrent from the product's sign
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assign t2 = invz ? -t : t;
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// Zero out product if Z >> product or product really should be zero
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assign r2 = ~proddenorm & killprod ? 106'b0 : r;
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assign s2 = ~proddenorm & killprod ? 106'b0 : s;
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assign r2 = killprod ? 106'b0 : r;
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assign s2 = killprod ? 106'b0 : s;
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// Compound adder
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// Consists of 3:2 CSA followed by long compound CPA
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@ -15,17 +15,17 @@ module align(z[51:0], ae[12:0], aligncnt, xzero, yzero, zzero, zdenorm, proddeno
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killprod, bypsel[1], bypplus1, byppostnorm);
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/////////////////////////////////////////////////////////////////////////////
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input [51:0] z; // Fraction of addend z;
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input [51:0] z; // Fraction of addend z;
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input [12:0] ae; // sign of exponent of addend z;
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input [11:0] aligncnt; // amount to shift
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input xzero; // Input X = 0
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input yzero; // Input Y = 0
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input zzero; // Input Z = 0
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input zdenorm; // Input Z = denorm
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input proddenorm;
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input [11:0] aligncnt; // amount to shift
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input xzero; // Input X = 0
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input yzero; // Input Y = 0
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input zzero; // Input Z = 0
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input zdenorm; // Input Z is denormalized
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input proddenorm; // product is denormalized
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input [1:1] bypsel; // Select bypass to X or Z
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input bypplus1; // Add one to bypassed result
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input byppostnorm; // Postnormalize bypassed result
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input bypplus1; // Add one to bypassed result
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input byppostnorm; // Postnormalize bypassed result
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output [157:0] t; // aligned addend (54 bits left of bpt)
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output bs; // sticky bit of addend
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output ps; // sticky bit of product
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@ -34,13 +34,13 @@ module align(z[51:0], ae[12:0], aligncnt, xzero, yzero, zzero, zdenorm, proddeno
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// Internal nodes
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reg [157:0] t; // aligned addend from shifter
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reg killprod; // Z >> product
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reg killprod; // Z >> product
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reg bs; // sticky bit of addend
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reg ps; // sticky bit of product
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reg [7:0] i; // temp storage for finding sticky bit
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wire [52:0] z1; // Z plus 1
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wire [51:0] z2; // Z selected after handling rounds
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wire [11:0] align104; // alignment count + 104
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wire [11:0] align104; // alignment count + 104
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// Increment fraction of Z by one if necessary for prerounded bypass
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// This incrementor delay is masked by the alignment count computation
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@ -56,7 +56,7 @@ module align(z[51:0], ae[12:0], aligncnt, xzero, yzero, zzero, zdenorm, proddeno
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// addend on right shifts. Handle special cases of shifting
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// by too much.
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always @(z2 or aligncnt or align104 or zzero or xzero or yzero or zdenorm)
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always @(z2 or aligncnt or align104 or zzero or xzero or yzero or zdenorm or proddenorm)
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begin
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// Default to clearing sticky bits
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@ -66,7 +66,7 @@ module align(z[51:0], ae[12:0], aligncnt, xzero, yzero, zzero, zdenorm, proddeno
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// And to using product as primary operand in adder I exponent gen
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killprod = 0;
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if(zzero) begin
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if(zzero) begin // if z = 0
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t = 158'b0;
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if (xzero || yzero) killprod = 1;
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end else if ((aligncnt > 53 && ~aligncnt[11]) || xzero || yzero) begin
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@ -75,8 +75,8 @@ module align(z[51:0], ae[12:0], aligncnt, xzero, yzero, zzero, zdenorm, proddeno
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t = {53'b0, ~zzero, z2, 52'b0};
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killprod = 1;
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ps = ~xzero && ~yzero;
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end else if ((ae[12] && align104[11])) begin //***fix the if statement
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// KEP if the multiplier's exponent overflows
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end else if ((ae[12] && align104[11]) && ~proddenorm) begin //***fix the if statement
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// KEP if the multiplier's exponent overflows
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t = {53'b0, ~zzero, z2, 52'b0};
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killprod = 1;
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ps = ~xzero && ~yzero;
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@ -85,7 +85,7 @@ module align(z[51:0], ae[12:0], aligncnt, xzero, yzero, zzero, zdenorm, proddeno
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t = 0;
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end else if (~aligncnt[11]) begin // Left shift by reasonable amount
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t = {53'b0, ~zzero, z2, 52'b0} << aligncnt;
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end else begin // Otherwise right shift
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end else begin // Otherwise right shift
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t = {53'b0, ~zzero, z2, 52'b0} >> -aligncnt;
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// use some behavioral code to find sticky bit. This is really
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@ -30,85 +30,85 @@ module array(x, y, xdenorm, ydenorm, r, s, bypsel, bypplus1);
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assign xnorm = xdenorm ? {x[50:0], 1'b0} : x; // normalization of denormalized numbers
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assign ynorm = ydenorm ? {y[50:0], 1'b0} : y;
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assign yExt = {2'b01,ynorm,1'b0}; // y extended and added assumed 1
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assign xExt = {2'b01,xnorm}; // x with added assumed 1
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//assign yExt = {2'b01,ynorm,1'b0}; // y extended and added assumed 1
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//assign xExt = {2'b01,xnorm}; // x with added assumed 1
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//booth encoding
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generate
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for(i=0; i<27; i=i+1) begin
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booth booth(.xExt(xExt), .choose(yExt[(i*2)+2:i*2]), .add1(add1[i]), .e(e[i]), .pp(pp[i]));
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end
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endgenerate
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// generate
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// for(i=0; i<27; i=i+1) begin
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// booth booth(.xExt(xExt), .choose(yExt[(i*2)+2:i*2]), .add1(add1[i]), .e(e[i]), .pp(pp[i]));
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// end
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// endgenerate
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assign acc[0] = {49'b0,~e[0],e[0],e[0],pp[0]};
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assign acc[1] = {50'b01,~e[1],pp[1],add1[0]};
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assign acc[2] = {48'b01,~e[2],pp[2],add1[1], 2'b0};
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assign acc[3] = {46'b01,~e[3],pp[3],add1[2], 4'b0};
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assign acc[4] = {44'b01,~e[4],pp[4],add1[3], 6'b0};
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assign acc[5] = {42'b01,~e[5],pp[5],add1[4], 8'b0};
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assign acc[6] = {40'b01,~e[6],pp[6],add1[5], 10'b0};
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assign acc[7] = {38'b01,~e[7],pp[7],add1[6], 12'b0};
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assign acc[8] = {36'b01,~e[8],pp[8],add1[7], 14'b0};
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assign acc[9] = {34'b01,~e[9],pp[9],add1[8], 16'b0};
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assign acc[10] = {32'b01,~e[10],pp[10],add1[9], 18'b0};
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assign acc[11] = {30'b01,~e[11],pp[11],add1[10], 20'b0};
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assign acc[12] = {28'b01,~e[12],pp[12],add1[11], 22'b0};
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assign acc[13] = {26'b01,~e[13],pp[13],add1[12], 24'b0};
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assign acc[14] = {24'b01,~e[14],pp[14],add1[13], 26'b0};
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assign acc[15] = {22'b01,~e[15],pp[15],add1[14], 28'b0};
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assign acc[16] = {20'b01,~e[16],pp[16],add1[15], 30'b0};
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assign acc[17] = {18'b01,~e[17],pp[17],add1[16], 32'b0};
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assign acc[18] = {16'b01,~e[18],pp[18],add1[17], 34'b0};
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assign acc[19] = {14'b01,~e[19],pp[19],add1[18], 36'b0};
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assign acc[20] = {12'b01,~e[20],pp[20],add1[19], 38'b0};
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assign acc[21] = {10'b01,~e[21],pp[21],add1[20], 40'b0};
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assign acc[22] = {8'b01,~e[22],pp[22],add1[21], 42'b0};
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assign acc[23] = {6'b01,~e[23],pp[23],add1[22], 44'b0};
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assign acc[24] = {4'b01,~e[24],pp[24],add1[23], 46'b0};
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assign acc[25] = {~e[25],pp[25],add1[24], 48'b0};
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assign acc[26] = {pp[26],add1[25], 50'b0};
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// assign acc[0] = {49'b0,~e[0],e[0],e[0],pp[0]};
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// assign acc[1] = {50'b01,~e[1],pp[1],add1[0]};
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// assign acc[2] = {48'b01,~e[2],pp[2],add1[1], 2'b0};
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// assign acc[3] = {46'b01,~e[3],pp[3],add1[2], 4'b0};
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// assign acc[4] = {44'b01,~e[4],pp[4],add1[3], 6'b0};
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// assign acc[5] = {42'b01,~e[5],pp[5],add1[4], 8'b0};
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// assign acc[6] = {40'b01,~e[6],pp[6],add1[5], 10'b0};
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// assign acc[7] = {38'b01,~e[7],pp[7],add1[6], 12'b0};
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// assign acc[8] = {36'b01,~e[8],pp[8],add1[7], 14'b0};
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// assign acc[9] = {34'b01,~e[9],pp[9],add1[8], 16'b0};
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// assign acc[10] = {32'b01,~e[10],pp[10],add1[9], 18'b0};
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// assign acc[11] = {30'b01,~e[11],pp[11],add1[10], 20'b0};
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// assign acc[12] = {28'b01,~e[12],pp[12],add1[11], 22'b0};
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// assign acc[13] = {26'b01,~e[13],pp[13],add1[12], 24'b0};
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// assign acc[14] = {24'b01,~e[14],pp[14],add1[13], 26'b0};
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// assign acc[15] = {22'b01,~e[15],pp[15],add1[14], 28'b0};
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// assign acc[16] = {20'b01,~e[16],pp[16],add1[15], 30'b0};
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// assign acc[17] = {18'b01,~e[17],pp[17],add1[16], 32'b0};
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// assign acc[18] = {16'b01,~e[18],pp[18],add1[17], 34'b0};
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// assign acc[19] = {14'b01,~e[19],pp[19],add1[18], 36'b0};
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// assign acc[20] = {12'b01,~e[20],pp[20],add1[19], 38'b0};
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// assign acc[21] = {10'b01,~e[21],pp[21],add1[20], 40'b0};
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// assign acc[22] = {8'b01,~e[22],pp[22],add1[21], 42'b0};
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// assign acc[23] = {6'b01,~e[23],pp[23],add1[22], 44'b0};
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// assign acc[24] = {4'b01,~e[24],pp[24],add1[23], 46'b0};
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// assign acc[25] = {~e[25],pp[25],add1[24], 48'b0};
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// assign acc[26] = {pp[26],add1[25], 50'b0};
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//*** resize adders
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generate
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for(i=0; i<9; i=i+1) begin
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add3comp2 #(.BITS(106)) add1(.a(acc[i*3]), .b(acc[i*3+1]), .c(acc[i*3+2]),
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.carry(carryTmp[i][105:0]), .sum(lv1add[i*2+1]));
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assign lv1add[i*2] = {carryTmp[i][104:0], 1'b0};
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end
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endgenerate
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// //*** resize adders
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// generate
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// for(i=0; i<9; i=i+1) begin
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// add3comp2 #(.BITS(106)) add1(.a(acc[i*3]), .b(acc[i*3+1]), .c(acc[i*3+2]),
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// .carry(carryTmp[i][105:0]), .sum(lv1add[i*2+1]));
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// assign lv1add[i*2] = {carryTmp[i][104:0], 1'b0};
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// end
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// endgenerate
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generate
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for(i=0; i<6; i=i+1) begin
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add3comp2 #(.BITS(106)) add2(.a(lv1add[i*3]), .b(lv1add[i*3+1]), .c(lv1add[i*3+2]),
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.carry(carryTmp[i+9][105:0]), .sum(lv2add[i*2+1]));
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assign lv2add[i*2] = {carryTmp[i+9][104:0], 1'b0};
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end
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endgenerate
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// generate
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// for(i=0; i<6; i=i+1) begin
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// add3comp2 #(.BITS(106)) add2(.a(lv1add[i*3]), .b(lv1add[i*3+1]), .c(lv1add[i*3+2]),
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// .carry(carryTmp[i+9][105:0]), .sum(lv2add[i*2+1]));
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// assign lv2add[i*2] = {carryTmp[i+9][104:0], 1'b0};
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// end
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// endgenerate
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generate
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for(i=0; i<4; i=i+1) begin
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add3comp2 #(.BITS(106)) add3(.a(lv2add[i*3]), .b(lv2add[i*3+1]), .c(lv2add[i*3+2]),
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.carry(carryTmp[i+15][105:0]), .sum(lv3add[i*2+1]));
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assign lv3add[i*2] = {carryTmp[i+15][104:0], 1'b0};
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end
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endgenerate
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// generate
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// for(i=0; i<4; i=i+1) begin
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// add3comp2 #(.BITS(106)) add3(.a(lv2add[i*3]), .b(lv2add[i*3+1]), .c(lv2add[i*3+2]),
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// .carry(carryTmp[i+15][105:0]), .sum(lv3add[i*2+1]));
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// assign lv3add[i*2] = {carryTmp[i+15][104:0], 1'b0};
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// end
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// endgenerate
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generate
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for(i=0; i<2; i=i+1) begin
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add4comp2 #(.BITS(106)) add4(.a(lv3add[i*4]), .b(lv3add[i*4+1]), .c(lv3add[i*4+2]), .d(lv3add[i*4+3]),
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.carry(carryTmp[i+19]), .sum(lv4add[i*2+1]));
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assign lv4add[i*2] = {carryTmp[i+19][104:0], 1'b0};
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end
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endgenerate
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// generate
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// for(i=0; i<2; i=i+1) begin
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// add4comp2 #(.BITS(106)) add4(.a(lv3add[i*4]), .b(lv3add[i*4+1]), .c(lv3add[i*4+2]), .d(lv3add[i*4+3]),
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// .carry(carryTmp[i+19]), .sum(lv4add[i*2+1]));
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// assign lv4add[i*2] = {carryTmp[i+19][104:0], 1'b0};
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// end
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// endgenerate
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add4comp2 #(.BITS(106)) add5(.a(lv4add[0]), .b(lv4add[1]), .c(lv4add[2]), .d(lv4add[3]) ,
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.carry(carryTmp[21]), .sum(s));
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assign r = {carryTmp[21][104:0], 1'b0};
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// add4comp2 #(.BITS(106)) add5(.a(lv4add[0]), .b(lv4add[1]), .c(lv4add[2]), .d(lv4add[3]) ,
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// .carry(carryTmp[21]), .sum(s));
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// assign r = {carryTmp[21][104:0], 1'b0};
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// assign r = 106'b0;
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// assign s = ({54'b1,xnorm} + (bypsel && bypplus1)) * {54'b1,ynorm};
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assign r = 106'b0;
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assign s = ({54'b1,xnorm} + (bypsel && bypplus1)) * {54'b1,ynorm};
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endmodule
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@ -19,7 +19,7 @@ module expgen(x[62:52], y[62:52], z[62:52],
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earlyres[62:52], earlyressel, bypsel[1], byppostnorm,
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killprod, sumzero, postnormalize, normcnt, infinity,
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invalid, overflow, underflow, inf,
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nan, xnan, ynan, znan, zdenorm, specialsel,
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nan, xnan, ynan, znan, zdenorm, proddenorm, specialsel,
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aligncnt, w[62:52], wbypass[62:52],
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prodof, sumof, sumuf, denorm0, ae[12:0]);
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/////////////////////////////////////////////////////////////////////////////
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@ -28,36 +28,37 @@ module expgen(x[62:52], y[62:52], z[62:52],
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input [62:52] y; // Exponent of multiplicand y
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input [62:52] z; // Exponent of addend z
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input [62:52] earlyres; // Result from other FPU block
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input earlyressel; // Select result from other block
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input earlyressel; // Select result from other block
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input [1:1] bypsel; // Bypass X or Z
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input byppostnorm; // Postnormalize bypassed result
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input killprod; // Z >> product
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input sumzero; // sum exactly equals zero
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input postnormalize; // postnormalize rounded result
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input byppostnorm; // Postnormalize bypassed result
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input killprod; // Z >> product
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input sumzero; // sum exactly equals zero
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input postnormalize; // postnormalize rounded result
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input [8:0] normcnt; // normalization shift count
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input infinity; // generate infinity on overflow
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input invalid; // Result invalid
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input overflow; // Result overflowed
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input underflow; // Result underflowed
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input inf; // Some input is infinity
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input nan; // Some input is NaN
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input xnan; // X is NaN
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input ynan; // Y is NaN
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input znan; // Z is NaN
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input zdenorm; // Z is denorm
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input specialsel; // Select special result
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input infinity; // generate infinity on overflow
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input invalid; // Result invalid
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input overflow; // Result overflowed
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input underflow; // Result underflowed
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input inf; // Some input is infinity
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input nan; // Some input is NaN
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input xnan; // X is NaN
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input ynan; // Y is NaN
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input znan; // Z is NaN
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input zdenorm; // Z is denorm
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input proddenorm; // product is denorm
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input specialsel; // Select special result
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output [11:0] aligncnt; // shift count for alignment shifter
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output [62:52] w; // Exponent of result
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output [62:52] wbypass; // Prerounded exponent for bypass
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output prodof; // X*Y exponent out of bounds
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output sumof; // X*Y+Z exponent out of bounds
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output sumuf; // X*Y+Z exponent underflows
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output denorm0; // exponent = 0 for denorm
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output [62:52] w; // Exponent of result
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output [62:52] wbypass; // Prerounded exponent for bypass
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output prodof; // X*Y exponent out of bounds
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output sumof; // X*Y+Z exponent out of bounds
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output sumuf; // X*Y+Z exponent underflows
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output denorm0; // exponent = 0 for denorm
|
||||
output [12:0] ae; //exponent of multiply
|
||||
|
||||
// Internal nodes
|
||||
|
||||
wire [12:0] aetmp; // Exponent of Multiply
|
||||
|
||||
wire [12:0] aligncnt0; // Shift count for alignment
|
||||
wire [12:0] aligncnt1; // Shift count for alignment
|
||||
wire [12:0] be; // Exponent of multiply
|
||||
@ -72,9 +73,11 @@ module expgen(x[62:52], y[62:52], z[62:52],
|
||||
// Note that the exponent does not have to be incremented on a postrounding
|
||||
// normalization of X because the mantissa was already increased. Report
|
||||
// if exponent is out of bounds
|
||||
assign ae = x + y - 1023;
|
||||
|
||||
assign prodof = (ae > 2046 && ~ae[12] && ~killprod);
|
||||
|
||||
assign ae = x + y - 1023;
|
||||
|
||||
assign prodof = (ae > 2046 && ~ae[12]);
|
||||
|
||||
// Compute alignment shift count
|
||||
// Adjust for postrounding normalization of Z.
|
||||
@ -82,8 +85,10 @@ module expgen(x[62:52], y[62:52], z[62:52],
|
||||
// check if a round overflows is shorter than the actual round and
|
||||
// is masked by the bypass mux and two 10 bit adder delays.
|
||||
|
||||
assign aligncnt0 = z - ae[10:0] + 13'b0;
|
||||
assign aligncnt1 = z - ae[10:0] + 13'b1;
|
||||
assign aligncnt0 = z - ae + 13'b0;// KEP use all of ae
|
||||
assign aligncnt1 = z - ae + 13'b1;
|
||||
//assign aligncnt0 = z - ae[10:0] + 13'b0;//original
|
||||
//assign aligncnt1 = z - ae[10:0] + 13'b1;
|
||||
assign aligncnt = bypsel[1] && byppostnorm ? aligncnt1 : aligncnt0;
|
||||
|
||||
// Select exponent (usually from product except in case of huge addend)
|
||||
@ -118,13 +123,17 @@ module expgen(x[62:52], y[62:52], z[62:52],
|
||||
// rounding mode. NaNs are propagated or generated.
|
||||
|
||||
assign specialres = earlyressel ? earlyres :
|
||||
invalid ? nanres :
|
||||
invalid | nan ? nanres : // KEP added nan
|
||||
overflow ? infinityres :
|
||||
inf ? 11'b11111111111 :
|
||||
underflow ? 11'b0 : 11'bx;
|
||||
|
||||
assign infinityres = infinity ? 11'b11111111111 : 11'b11111111110;
|
||||
|
||||
// IEEE 754-2008 section 6.2.3 states:
|
||||
// "If two or more inputs are NaN, then the payload of the resulting NaN should be
|
||||
// identical to the payload of one of the input NaNs if representable in the destination
|
||||
// format. This standard does not specify which of the input NaNs will provide the payload."
|
||||
assign nanres = xnan ? x : (ynan ? y : (znan? z : 11'b11111111111));
|
||||
|
||||
// A mux selects the early result from other FPU blocks or the
|
||||
|
||||
@ -13,31 +13,31 @@ module flag(xnan, ynan, znan, xinf, yinf, zinf, prodof, sumof, sumuf,
|
||||
inf, nan, invalid, overflow, underflow, inexact);
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
input xnan; // X is NaN
|
||||
input ynan; // Y is NaN
|
||||
input znan; // Z is NaN
|
||||
input xinf; // X is Inf
|
||||
input yinf; // Y is Inf
|
||||
input zinf; // Z is Inf
|
||||
input prodof; // X*Y overflows exponent
|
||||
input sumof; // X*Y + z underflows exponent
|
||||
input sumuf; // X*Y + z underflows exponent
|
||||
input psign; // Sign of product
|
||||
input zsign; // Sign of z
|
||||
input xzero; // x = 0
|
||||
input yzero; // y = 0
|
||||
input [1:0] v; // R and S bits of result
|
||||
output inf; // Some source is Inf
|
||||
output nan; // Some source is NaN
|
||||
output invalid; // Result is invalid
|
||||
output overflow; // Result overflowed
|
||||
output underflow; // Result underflowed
|
||||
output inexact; // Result is not an exact number
|
||||
input xnan; // X is NaN
|
||||
input ynan; // Y is NaN
|
||||
input znan; // Z is NaN
|
||||
input xinf; // X is Inf
|
||||
input yinf; // Y is Inf
|
||||
input zinf; // Z is Inf
|
||||
input prodof; // X*Y overflows exponent
|
||||
input sumof; // X*Y + z underflows exponent
|
||||
input sumuf; // X*Y + z underflows exponent
|
||||
input psign; // Sign of product
|
||||
input zsign; // Sign of z
|
||||
input xzero; // x = 0
|
||||
input yzero; // y = 0
|
||||
input [1:0] v; // R and S bits of result
|
||||
output inf; // Some source is Inf
|
||||
output nan; // Some source is NaN
|
||||
output invalid; // Result is invalid
|
||||
output overflow; // Result overflowed
|
||||
output underflow; // Result underflowed
|
||||
output inexact; // Result is not an exact number
|
||||
|
||||
// Internal nodes
|
||||
|
||||
wire prodinf; // X*Y larger than max possible
|
||||
wire suminf; // X*Y+Z larger than max possible
|
||||
wire prodinf; // X*Y larger than max possible
|
||||
wire suminf; // X*Y+Z larger than max possible
|
||||
|
||||
// If any input is NaN, propagate the NaN
|
||||
|
||||
@ -46,12 +46,14 @@ module flag(xnan, ynan, znan, xinf, yinf, zinf, prodof, sumof, sumuf,
|
||||
// Same with infinity (inf - inf and O * inf don't propagate inf
|
||||
// but it's ok becaue illegal op takes higher precidence)
|
||||
|
||||
assign inf= xinf || yinf || zinf;
|
||||
assign inf= xinf || yinf || zinf || suminf;//KEP added suminf
|
||||
//assign inf= xinf || yinf || zinf;//original
|
||||
|
||||
// Generate infinity checks
|
||||
|
||||
assign prodinf = prodof && ~xnan && ~ynan;
|
||||
assign suminf = sumof && ~xnan && ~ynan && ~znan;
|
||||
//KEP added if the product is infinity then sum is infinity
|
||||
assign suminf = prodinf | sumof && ~xnan && ~ynan && ~znan;
|
||||
|
||||
// Set invalid flag for following cases:
|
||||
// 1) Inf - Inf
|
||||
@ -59,8 +61,7 @@ module flag(xnan, ynan, znan, xinf, yinf, zinf, prodof, sumof, sumuf,
|
||||
// 3) Output = NaN (this is not part of the IEEE spec, only 486 proj)
|
||||
|
||||
assign invalid = (xinf || yinf || prodinf) && zinf && (psign ^ zsign) ||
|
||||
xzero && yinf || yzero && xinf ||
|
||||
nan;
|
||||
xzero && yinf || yzero && xinf;// KEP remove case 3) above
|
||||
|
||||
// Set the overflow flag for the following cases:
|
||||
// 1) Rounded multiply result would be out of bounds
|
||||
|
||||
@ -103,7 +103,7 @@ module fmac(xrf, y, zrf, rn, rz, rp, rm,
|
||||
earlyres[62:52], earlyressel, bypsel[1], byppostnorm,
|
||||
killprod, sumzero, postnorrnalize, normcnt,
|
||||
infinity, invalid, overflow, underflow,
|
||||
inf, nan, xnan, ynan, znan, zdenorm, specialsel,
|
||||
inf, nan, xnan, ynan, znan, zdenorm, proddenorm, specialsel,
|
||||
aligncnt, w[62:52], wbypass[62:52],
|
||||
prodof, sumof, sumuf, denorm0, ae);
|
||||
// Instantiate special case detection across datapath & exponent path
|
||||
@ -120,7 +120,7 @@ assign wbypass[63] = w[63];
|
||||
// Instantiate control logic
|
||||
|
||||
sign sign(x[63], y[63], z[63], negsum0, negsum1, bs, ps,
|
||||
killprod, rm, sumzero, nan, invalid, xinf, yinf, inf,
|
||||
killprod, rm, overflow, sumzero, nan, invalid, xinf, yinf, zinf, inf,
|
||||
w[63], invz, negsum, selsum1, psign);
|
||||
flag flag(xnan, ynan, znan, xinf, yinf, zinf, prodof, sumof, sumuf,
|
||||
psign, z[63], xzero, yzero, v[1:0],
|
||||
|
||||
@ -18,12 +18,12 @@ module normalize(sum[157:0], normcnt, sumzero, bs, ps, denorm0, zdenorm, v[53:0]
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
input [157:0] sum; // sum
|
||||
input [8:0] normcnt; // normalization shift count
|
||||
input sumzero; // sum is zero
|
||||
input bs; // sticky bit for addend
|
||||
input ps; // sticky bit for product
|
||||
input denorm0; // exponent = -1023
|
||||
input zdenorm; // Input Z is denormalized
|
||||
output [53:0] v; // normalized sum, R, S bits
|
||||
input sumzero; // sum is zero
|
||||
input bs; // sticky bit for addend
|
||||
input ps; // sticky bit for product
|
||||
input denorm0; // exponent = -1023
|
||||
input zdenorm; // Input Z is denormalized
|
||||
output [53:0] v; // normalized sum, R, S bits
|
||||
|
||||
// Internal nodes
|
||||
|
||||
|
||||
@ -19,37 +19,37 @@ module round(v[53:0], earlyres[51:0], earlyressel, rz, rn, rp, rm, wsign,
|
||||
w[51:0], postnormalize, infinity, specialsel);
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
input [53:0] v; // normalized sum, R, S bits
|
||||
input [51:0] earlyres; // result from other FPU blocks
|
||||
input earlyressel; // use result from other FPU blocks
|
||||
input rz; // Round toward zero
|
||||
input rn; // Round toward nearest
|
||||
input rp; // Round toward plus infinity
|
||||
input rm; // Round toward minus infinity
|
||||
input wsign; // Sign of result
|
||||
input invalid; // Trap on infinity, NaN, denorm
|
||||
input overflow; // Result overflowed
|
||||
input underflow; // Result underflowed
|
||||
input inf; // Some input is infinity
|
||||
input nan; // Some input is NaN
|
||||
input xnan; // X is NaN
|
||||
input ynan; // Y is NaN
|
||||
input znan; // Z is NaN
|
||||
input [51:0] x; // Input X
|
||||
input [51:0] y; // Input Y
|
||||
input [51:0] z; // Input Z
|
||||
output [51:0] w; // rounded result of FMAC
|
||||
output postnormalize; // Right shift 1 for post-rounding norm
|
||||
output infinity; // Generate infinity on overflow
|
||||
output specialsel; // Select special result
|
||||
input [53:0] v; // normalized sum, R, S bits
|
||||
input [51:0] earlyres; // result from other FPU blocks
|
||||
input earlyressel; // use result from other FPU blocks
|
||||
input rz; // Round toward zero
|
||||
input rn; // Round toward nearest
|
||||
input rp; // Round toward plus infinity
|
||||
input rm; // Round toward minus infinity
|
||||
input wsign; // Sign of result
|
||||
input invalid; // Trap on infinity, NaN, denorm
|
||||
input overflow; // Result overflowed
|
||||
input underflow; // Result underflowed
|
||||
input inf; // Some input is infinity
|
||||
input nan; // Some input is NaN
|
||||
input xnan; // X is NaN
|
||||
input ynan; // Y is NaN
|
||||
input znan; // Z is NaN
|
||||
input [51:0] x; // Input X
|
||||
input [51:0] y; // Input Y
|
||||
input [51:0] z; // Input Z
|
||||
output [51:0] w; // rounded result of FMAC
|
||||
output postnormalize; // Right shift 1 for post-rounding norm
|
||||
output infinity; // Generate infinity on overflow
|
||||
output specialsel; // Select special result
|
||||
|
||||
// Internal nodes
|
||||
|
||||
wire plus1; // Round by adding one
|
||||
wire [52:0] v1; // Result + 1 (for rounding)
|
||||
wire [51:0] specialres; // Result of exceptional case
|
||||
wire plus1; // Round by adding one
|
||||
wire [52:0] v1; // Result + 1 (for rounding)
|
||||
wire [51:0] specialres; // Result of exceptional case
|
||||
wire [51:0] infinityres; // Infinity or largest real number
|
||||
wire [51:0] nanres; // Propagated or generated NaN
|
||||
wire [51:0] nanres; // Propagated or generated NaN
|
||||
|
||||
// Compute if round should occur. This equation is derived from
|
||||
// the rounding tables.
|
||||
@ -77,7 +77,7 @@ module round(v[53:0], earlyres[51:0], earlyressel, rz, rn, rp, rm, wsign,
|
||||
assign specialsel = earlyressel || overflow || underflow || invalid ||
|
||||
nan || inf;
|
||||
assign specialres = earlyressel ? earlyres :
|
||||
invalid ? nanres :
|
||||
invalid | nan ? nanres : //KEP added nan
|
||||
overflow ? infinityres :
|
||||
inf ? 52'b0 :
|
||||
underflow ? 52'b0 : 52'bx; // default to undefined
|
||||
@ -93,6 +93,11 @@ module round(v[53:0], earlyres[51:0], earlyressel, rz, rn, rp, rm, wsign,
|
||||
// NaN inputs are already quiet, we don't have to force them quiet.
|
||||
|
||||
// assign nanres = xnan ? x: (ynan ? y : (znan ? z : {1'b1, 51'b0})); // original
|
||||
|
||||
// IEEE 754-2008 section 6.2.3 states:
|
||||
// "If two or more inputs are NaN, then the payload of the resulting NaN should be
|
||||
// identical to the payload of one of the input NaNs if representable in the destination
|
||||
// format. This standard does not specify which of the input NaNs will provide the payload."
|
||||
assign nanres = xnan ? {1'b1, x[50:0]}: (ynan ? {1'b1, y[50:0]} : (znan ? {1'b1, z[50:0]} : {1'b1, 51'b0}));// KEP 210112 add the 1 to make NaNs quiet
|
||||
|
||||
// Select result with 4:1 mux
|
||||
|
||||
@ -10,8 +10,8 @@
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
module sign(xsign, ysign, zsign, negsum0, negsum1, bs, ps, killprod, rm,
|
||||
sumzero, nan, invalid, xinf, yinf, inf, wsign, invz, negsum, selsum1, psign);
|
||||
module sign(xsign, ysign, zsign, negsum0, negsum1, bs, ps, killprod, rm, overflow,
|
||||
sumzero, nan, invalid, xinf, yinf, zinf, inf, wsign, invz, negsum, selsum1, psign);
|
||||
////////////////////////////////////////////////////////////////////////////I
|
||||
|
||||
input xsign; // Sign of X
|
||||
@ -23,11 +23,13 @@ module sign(xsign, ysign, zsign, negsum0, negsum1, bs, ps, killprod, rm,
|
||||
input ps; // sticky bit from product
|
||||
input killprod; // Product forced to zero
|
||||
input rm; // Round toward minus infinity
|
||||
input overflow; // Round toward minus infinity
|
||||
input sumzero; // Sum = O
|
||||
input nan; // Some input is NaN
|
||||
input invalid; // Result invalid
|
||||
input xinf; // X = Inf
|
||||
input yinf; // Y = Inf
|
||||
input zinf; // Y = Inf
|
||||
input inf; // Some input = Inf
|
||||
output wsign; // Sign of W
|
||||
output invz; // Invert addend into adder
|
||||
@ -47,13 +49,13 @@ module sign(xsign, ysign, zsign, negsum0, negsum1, bs, ps, killprod, rm,
|
||||
assign psign = xsign ^ ysign;
|
||||
|
||||
// Invert addend if sign of Z is different from sign of product assign invz = zsign ^ psign;
|
||||
assign invz = zsign ^ psign;
|
||||
assign invz = (zsign ^ psign);
|
||||
// Select +l mode for adder and compute if result must be negated
|
||||
// This is done according to cases based on the sticky bit.
|
||||
|
||||
always @(invz or negsum0 or negsum1 or bs or ps)
|
||||
begin
|
||||
if (~invz) begin // both inputs have same sign
|
||||
if (~invz) begin // both inputs have same sign //KEP if overflow
|
||||
negsum = 0;
|
||||
selsum1 = 0;
|
||||
end else if (bs) begin // sticky bit set on addend
|
||||
@ -85,9 +87,8 @@ module sign(xsign, ysign, zsign, negsum0, negsum1, bs, ps, killprod, rm,
|
||||
// sum/difference shall be -0. However, x+x = x-(-X) retains the same sign as x even when x is zero."
|
||||
|
||||
assign zerosign = (~invz && killprod) ? zsign : rm;
|
||||
assign infsign = psign; //KEP 210112 keep the correct sign when result is infinity
|
||||
// assign infsign = xinf ? (yinf ? psign : xsign) : yinf ? ysign : zsign;//original
|
||||
assign wsign =invalid? 0 : (inf ? infsign:
|
||||
(sumzero ? zerosign : psign ^ negsum));
|
||||
assign infsign = zinf ? zsign : psign; //KEP 210112 keep the correct sign when result is infinity
|
||||
//assign infsign = xinf ? (yinf ? psign : xsign) : yinf ? ysign : zsign;//original
|
||||
assign wsign = invalid ? 0 : (inf ? infsign :(sumzero ? zerosign : psign ^ negsum));
|
||||
|
||||
endmodule
|
||||
|
||||
@ -14,23 +14,23 @@ module special(x[63:0], y[63:0], z[63:0], ae, xzero, yzero, zzero,
|
||||
xnan, ynan, znan, xdenorm, ydenorm, zdenorm, proddenorm, xinf, yinf, zinf);
|
||||
/////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
input [63:0] x; // Input x
|
||||
input [63:0] x; // Input x
|
||||
input [63:0] y; // Input Y
|
||||
input [63:0] z; // Input z
|
||||
input [12:0] ae; // exponent of product
|
||||
output xzero; // Input x = 0
|
||||
output yzero; // Input y = 0
|
||||
output zzero; // Input z = 0
|
||||
output xnan; // x is NaN
|
||||
output ynan; // y is NaN
|
||||
output znan; // z is NaN
|
||||
output xdenorm; // x is denormalized
|
||||
output ydenorm; // y is denormalized
|
||||
output zdenorm; // z is denormalized
|
||||
output proddenorm; // product is denormalized
|
||||
output xinf; // x is infinity
|
||||
output yinf; // y is infinity
|
||||
output zinf; // z is infinity
|
||||
input [12:0] ae; // exponent of product
|
||||
output xzero; // Input x = 0
|
||||
output yzero; // Input y = 0
|
||||
output zzero; // Input z = 0
|
||||
output xnan; // x is NaN
|
||||
output ynan; // y is NaN
|
||||
output znan; // z is NaN
|
||||
output xdenorm; // x is denormalized
|
||||
output ydenorm; // y is denormalized
|
||||
output zdenorm; // z is denormalized
|
||||
output proddenorm; // product is denormalized
|
||||
output xinf; // x is infinity
|
||||
output yinf; // y is infinity
|
||||
output zinf; // z is infinity
|
||||
|
||||
// In the actual circuit design, the gates looking at bits
|
||||
// 51:0 and at bits 62:52 should be shared among the various detectors.
|
||||
|
||||
@ -1 +1,130 @@
|
||||
0020000803ffffff bfcb4181a9468e24 000fffffffffffff 7fe2f9c2bca0f33c 00092f9c2bca0f33 Wrong zdenorm 18
|
||||
0000000000000001 7fdffffeffffffbf 4000000000080004 4007ffffc007fff5 4000000000080005 Wrong xdenorm 85959
|
||||
0000000000000001 c3ded4d0b02cd6aa 000c158ac12ac439 83eed4d0b02cd6ae 80bed1cb4d7c8bf9 Wrong xdenorm zdenorm 91485
|
||||
c15000000010001f 434ffffffffffffe 47f55792228596a0 c7e550dbbaf4d2c2 47f557922285969f Wrong 97625
|
||||
0000000000000001 7fe0000000000001 4340000000000001 4340000000000002 4340000000000001 Wrong xdenorm 99467
|
||||
0000000000000001 bfdffffffffffffe 801fffffffffbfc0 8021ffffffffdfe0 801fffffffffbfc0 Wrong xdenorm 117273
|
||||
0000000000000001 ffe0000000000000 40d4000040000000 40d3ffc040000000 40d4000040000000 Wrong xdenorm 133851
|
||||
000fffffffffffff 3fcffc007fffffff 800fffffffffffff 800800ffe0000000 800c007fefffffff Wrong xdenorm zdenorm 147973
|
||||
000fffffffffffff 3feffffffffffffe 000ffffffffffffe 001ffffffffffffd 001ffffffffffffc Wrong xdenorm zdenorm 154727
|
||||
000ffffffffffffe 41dffffffffff900 0000000000000001 02000000000ffc7e 01fffffffffff8fc Wrong xdenorm zdenorm 230863
|
||||
0010000000000000 bf4fdffffff7fffe 800ffffffffffffe 801003fbfffffeff 801003fbfffffefe Wrong zdenorm 308227
|
||||
0010000000000000 be6fffffbffffff7 8000000000000000 8000000000000000 800000000fffffe0 Wrong w=-zero unflw 313753
|
||||
0010000000000001 bcafffffffffffff 801fffffffffffff 8000000000000000 8020000000000000 Wrong w=-zero unflw 392345
|
||||
0010000000000001 bfe0000000000001 800ffffffffffffe 8018000000000000 8017ffffffffffff Wrong zdenorm 397871
|
||||
802000003ffffbff c3cfffffffffffd7 0000000000000001 040000003ffffbeb 040000003ffffbea Wrong zdenorm 448219
|
||||
dc10000000001eff 0000000000000001 802d63f274ada691 9c20000000001f01 98f0000000001eff Wrong ydenorm 489971
|
||||
001ffffffffffffe 3fddfbffffffffff 000ffffffffffffe 001efdfffffffffe 001efdfffffffffd Wrong zdenorm 551371
|
||||
3ca0000000000000 0000000000000001 000e8d6ac606e59d 000e8d6ac606e59e 000e8d6ac606e59d Wrong ydenorm zdenorm 559353
|
||||
3ca0000000000000 434ffffffffffffe c019cab46f8c90a7 c011cab46f8c90a7 c011cab46f8c90a8 Wrong 586983
|
||||
3ca0000000000001 bfe000000fffdfff 3fee60af9e2e4b00 bfa9f5061d1b5008 3fee60af9e2e4aff Wrong 649611
|
||||
3ca0000000000001 7fe0000000000000 ffefffffffffffff 7ca8000000000000 ffeffffffffffffe Wrong 657593
|
||||
44f0000000000dff 000000007fbffffe 801ffffffffffffe 05000000ff800dfb 03bfefffff801bf0 Wrong ydenorm 680311
|
||||
3ca0000000000001 bfffffffffffffff 3ff0007ffffffc00 bfefff0000000802 3ff0007ffffffbff Wrong 680925
|
||||
3cafffffffffffff 3caffffffffffffe bcaffffffffffffe 397fffffffffffff bcaffffffffffffc Wrong 707327
|
||||
3cafffffffffffff c01ffffffffffffe c02cbe486a2b0809 c02cbe486a2b0809 c02cbe486a2b080a Wrong 758289
|
||||
000667c5d67e1d85 3fdfeffffdffffff 001fffffffffffff 002398247cab1886 002199247ccb1886 Wrong xdenorm 763201
|
||||
000007fffffffffe 3f6ffffffe01fffe 000ffffffffffffe 00100807ffff7fff 00100007ffffff7e Wrong xdenorm zdenorm 768727
|
||||
3caffffffffffffe 4060000001000006 4070001fffff7ffe 4070001fffff7ffe 4070001fffff7fff Wrong 771183
|
||||
3caffffffffffffe 3fdfffffffffffff 3fe0000000000000 3fe0000000000000 3fe0000000000001 Wrong 779165
|
||||
bfd7ffffffbfffff 4000000000000000 3fffffffffffffff 3ff40000001fffff 3ff4000000200000 Wrong 787147
|
||||
3caffffffffffffe c00ffffffffffffe c01000000020007f c01000000020007f c010000000200080 Wrong 824601
|
||||
3caffffffffffffe c00fffffffffff08 4010000000000001 4010000000000001 4010000000000000 Wrong 827671
|
||||
800000000000007e ffd26a0f710537a9 c01b3b74de550046 c018ee32f034592d c01b3b74de550022 Wrong xdenorm 861441
|
||||
47f9aa99d39dd7d8 0000000000000001 8000000000000000 0809aa99d39dd7db 04d9aa99d39dd7d8 Wrong ydenorm 908719
|
||||
bfef000004000000 c000000000000000 c34ff80000000006 42afffffffffebe0 c34ff80000000005 Wrong 1031519
|
||||
bfe0010000007fff 3ff00003ffffff7f 4340000000000000 4340000000000000 433fffffffffffff Wrong 1039501
|
||||
3fdffffffffffffe 000ffffffffffffe 8000000000000001 fcdfffffffffffff 0007fffffffffffe Wrong ydenorm zdenorm 1049939
|
||||
802000007fffffbf 400ffffffffffffe 8000000000000001 804100007fffffbe 804000007fffffbe Wrong zdenorm 1068973
|
||||
3fdffffffffffffe bfffffffffffffff 3fefffffffffffff 3caffffffffffffe 3cafffffffffffff Wrong 1099673
|
||||
c7fffffffb7fffff 37efffffffdffbff c34000003ffffffc c34000003ffffffc c34000003ffffffd Wrong 1104585
|
||||
3fe0000000000001 3ca0000000000000 bcaffffffffffffe bca7fffffffffffd bca7fffffffffffe Wrong 1193615
|
||||
bfe00000000effff 800fffffffffffff 8010000000000001 8000000000000000 8007fffffff88002 Wrong w=-zero ydenorm unflw 1223701
|
||||
3feffffffffffffe 3ff0000000000000 bfefffffffffffff bc9ffffffffffffc bca0000000000000 Wrong 1342817
|
||||
3feffffffffffffe 801fffffffffffff 800007fffffbfffe 802401fffffefffe 802003fffffdfffe Wrong zdenorm 1366149
|
||||
bfd0002000007fff 0000000000000001 0010000000000001 0000000000000000 0010000000000001 Wrong ydenorm unflw 1466845
|
||||
0003476357ebf517 7fe000004000003f 8000000000000000 3ff68ec70a130546 3fda3b1b284c141d Wrong xdenorm 1503685
|
||||
4000002003fffffe bc4fffffbffffffe bfbfffffffffe3ff bfbfffffffffe3ff bfbfffffffffe400 Wrong 1635081
|
||||
3ca00ffdffffffff 3fdffffffffffffe bfe0000000000001 bfe0000000000001 bfe0000000000000 Wrong 1687885
|
||||
801fffffbf000000 4012b6da70c3decc 0000000000000006 8041b6da4ac07317 8042b6da4ac07316 Wrong zdenorm 1753583
|
||||
b7ff7ffffffff000 7fe0000000000000 78b01fffefffffff 78b01f03efffffff 78b01f03f0000000 Wrong 1843841
|
||||
400fffffffffffff 8000000000000001 801fffffffffffff 8030000000000000 8020000000000001 Wrong ydenorm 1851209
|
||||
00003fefffffffff ffeffffffffffffe 8000000000000000 c0007fdffffffffd bfaff7ffffffff7e Wrong xdenorm 1881295
|
||||
800000000003fffe 578284b14dfcc6e4 8000000000000000 979284b14e060938 958284a80ba41fe6 Wrong xdenorm 1989973
|
||||
bfdeffffff000000 002ffffffffc3ffe 0000002003fffffe 8016ffeffcfc5dff 801effdffafc5e00 Wrong zdenorm 2018831
|
||||
401fffffffffffff 3fdffffffffffffe c340000000400002 433fffffff800000 c340000000400000 Wrong 2106633
|
||||
401fffffffffffff 4010000000000001 c050ffffffff0000 c041fffffffdffff c041fffffffe0000 Wrong 2117685
|
||||
4340000000000000 3fd0000000000000 3fd0000000000001 4320000000000000 4320000000000001 Wrong 2243555
|
||||
bcb58ba32df145e0 3fbe0000003fffff 3fe0000000000000 3fe0000000000000 3fdfffffffffffff Wrong 2365741
|
||||
bfed82e3c6c037db 3ff0000000000000 4340000000000000 4340000000000000 433fffffffffffff Wrong 2389687
|
||||
3fdfffffffff7000 bcaffffffffffffe 3fe0000000000001 3fe0000000000001 3fe0000000000000 Wrong 2417317
|
||||
8000000002000000 ff100001efffffff 8d261bb2da873976 3f200001f400007b 3d800001efffffff Wrong xdenorm 2422229
|
||||
bb0fb893e0decb72 c1cffff7ffbfffff c03ffc0000003fff c03ffc0000003fff c03ffc0000003ffe Wrong 2546871
|
||||
800000000e000000 3fffffffffffffff 034ffff80ffffffe 034ffff80ffffffc 034ffff80ffffffe Wrong xdenorm 2600903
|
||||
7fe0000000000001 4000000000000000 ffefffffffffffff 7ff0000000000000 7cb8000000000000 Wrong w=+inf 2602745
|
||||
7fe0000000000001 8000000000000001 c010000000000001 c014000000000002 c010000000000002 Wrong ydenorm 2619323
|
||||
7fe0000000000001 bcafffffffffffff 7fefffffdffffffc fe70000002800000 7fefffffdffffffb Wrong 2626077
|
||||
7fefffffffffffff 0000000000000001 37ffffff7ffffeff 4000000000000001 3ccfffffffffffff Wrong ydenorm 2653707
|
||||
3feffffffffbfffd 3ca0000000000001 bfe0000000000001 3fe0000000000000 bfe0000000000000 Wrong 2660461
|
||||
000ffffffff00006 bfe0000000000001 0000000000000001 7dfffff400000002 8007fffffff80002 Wrong xdenorm zdenorm 2770981
|
||||
fd61dd32fb8e3b2c 0000000000000001 801ffffffffffffe bd71dd32fb8e3b2e ba41dd32fb8e3b2c Wrong ydenorm 3003073
|
||||
000fff000000000f 3ff00800001fffff 8010000000000000 0000000000000000 000006ff801ffe0e Wrong xdenorm unflw 3117277
|
||||
8000000000000001 400effffff000000 0010000000000000 8000000000000000 000ffffffffffffc Wrong w=-zero xdenorm unflw 3143065
|
||||
8000000000000001 40211275ffe5ee3c 0000000000000001 802e24ebffcbdc7c 8000000000000008 Wrong xdenorm zdenorm 3148591
|
||||
8000000000000001 c1c01ffffffffefe 03100007fe000000 0310000900000000 03100007fe000000 Wrong xdenorm 3152889
|
||||
8000000000000001 3fe0000000000001 800fffffffffffff 8014000000000000 8010000000000000 Wrong xdenorm zdenorm 3155345
|
||||
8000000000000001 7fef848cc01517b4 c340000000000001 c340000000000002 c340000000000001 Wrong xdenorm 3170695
|
||||
8000000000000001 7feffffffffffffe 410ffffffc007ffe 410fffeffc007ffe 410ffffffc007ffe Wrong xdenorm 3173151
|
||||
8000000000000001 bffffffffffffffe 002e000000100000 0033000000080000 002e000000100001 Wrong xdenorm 3195255
|
||||
8000000000000001 ffe0000000000000 3feffffffffffffe 4000000000000000 3ff0000000000001 Wrong xdenorm 3205079
|
||||
8000000000000001 ffe0000000000001 c1ffbfffdffffffe c1ffbfffdfeffffe c1ffbfffdffffffe Wrong xdenorm 3206307
|
||||
800fffffffffffff 3ff0000000000000 001ffffffffffffe 0000000000000000 000fffffffffffff Wrong xdenorm unflw 3227183
|
||||
3e7ffffffefc0000 bfffffffffffffff 41c0ea1ad0c683e5 c1be2bca5e72f83a 41c0ea1ad0c683e3 Wrong 3264023
|
||||
3fffa9456a66b8c6 3caffffffffffffe c00ffffffffffffe c00ffffffffffffe c00ffffffffffffd Wrong 3290425
|
||||
800ffffffffffffe 3fe0000000000001 0010000400000010 0000000000000000 0008000400000011 Wrong xdenorm unflw 3294723
|
||||
800ffffffffffffe 3fd0000000007ffe 000fffffffffffff 0007ffffffffc001 000bffffffffe000 Wrong xdenorm zdenorm 3308845
|
||||
800ffffffffffffe c010000000000000 800dfede47fbc1e2 002880486e010f84 00290090dc021f0b Wrong xdenorm zdenorm 3338931
|
||||
bfdffc90d6e1fc1f 3ca1ffffffffeffe bfe66ad464a87aac bfe66ad464a87aac bfe66ad464a87aad Wrong 3367175
|
||||
8010000000000000 bfe0000000000000 000fffffffffffff 0018000000000000 0017ffffffffffff Wrong zdenorm 3398489
|
||||
7fe800000000003e 8004de935d68d1e8 801fffffffffffff c0034ddd0c1d3b0e bfed37743074ebbb Wrong ydenorm 3437785
|
||||
8010000000000001 bfefffffffffffff 801ffffffffffffe 8000000000000000 800ffffffffffffe Wrong w=-zero unflw 3470327
|
||||
801fffffffffffff bfdffffffffffffe 0000000000021fff 0018000000010ffe 0010000000021ffe Wrong zdenorm 3537867
|
||||
0005e0458a43fbdb 7fdfffbfffffffff 0000000000000000 3ffbc0539371cea5 3fe780e726e39d4b Wrong xdenorm 3691981
|
||||
bca0000000000001 3cafffffffffffff 3cafffffffffffff b970000000000000 3caffffffffffffe Wrong 3707945
|
||||
bca0000000000001 3fefffffffffffff bff0400000000400 bff0400000000400 bff0400000000401 Wrong 3714699
|
||||
bca0000000000001 c34ffffffffffffe c000000000000000 0000000000000000 b980000000000000 Wrong 3763205
|
||||
bcafffffffffffff 3fc200001fffffff 3fdffff00000ffff 3fdffff00000ffff 3fdffff00000fffe Wrong 3788379
|
||||
bcafffffffffffff 800ffffffffffffe 8000000000000000 0000000000000000 0000000000000001 Wrong ydenorm unflw 3807413
|
||||
bcaffffffffffffe 3fdffffffffffffe 3ff0000000000000 3ff0000000000000 3fefffffffffffff Wrong 3851621
|
||||
bcaffffffffffffe 001ffffffffc0000 8000000000000001 8000000000000005 8000000000000003 Wrong zdenorm 3878023
|
||||
7fec5fed92358a74 400000001bffffff ffefc0003ffffffe 7ff0000000000000 7fe8ffdb47bad466 Wrong w=+inf 3889689
|
||||
bfdfffffffffffff 000fffffffffffff 0000000000000000 8000000000000000 8007ffffffffffff Wrong w=-zero ydenorm unflw 4050557
|
||||
bfdfffffffffffff 8000000000000001 8010000000800400 8000000000000000 8010000000800400 Wrong w=-zero ydenorm unflw 4084941
|
||||
bfdfffffffffffff bff0000000000000 bfe0000000000001 bca7ffffffffffff bca8000000000000 Wrong 4100291
|
||||
bff400003ffffffe bfeffffffffffffe 434fffffffffffff 434fffffffffffff 4350000000000000 Wrong 4169059
|
||||
43f00002003ffffe 8000000000000001 0010000000000000 8400000200400000 80cffe04007ffffc Wrong ydenorm 4224319
|
||||
bfe0000000000000 801fffffffffffff 00000007fff80000 00180003fffc0000 00100007fff80000 Wrong zdenorm 4228617
|
||||
bfe0000000000000 c000000000000001 c00ffffffffffffe c007fffffffffffd c007fffffffffffe Wrong 4243967
|
||||
bfcfdffffeffffff 8000000000000001 000fffffffffe080 0011fdffffeff040 000fffffffffe080 Wrong ydenorm zdenorm 4573685
|
||||
bfffffffffffffff 0000000000000001 8010000000000001 8020000000000001 8010000000000003 Wrong ydenorm 4608683
|
||||
bfffffffffffffff 3cafffffffffffff 3ff00000040001ff bfeffffff7fffc06 3ff00000040001fd Wrong 4615437
|
||||
d2b6d8b0e4fde949 0000000000000001 0011fffffffffeff 92c6d8b0e4fde94c 8f96d8b0e4fde949 Wrong ydenorm 4678679
|
||||
3fd07dfffffffffe 8010000000000001 0000000000000001 7fef040000000006 80041f7fffffffff Wrong zdenorm 4716133
|
||||
bffffffffffffffe bfffffffffffffff c00ffffffffffffe bcbffffffffffffc bcbffffffffffffe Wrong 4730255
|
||||
c000000000000001 00000000004fffff 801ffffffffffffe 80280000004fffff 80200000004ffffe Wrong ydenorm 4839547
|
||||
c00982d68cfe066b 000ffffffffffffe 8000000000000001 802d82d68cfe0668 802982d68cfe0668 Wrong ydenorm zdenorm 4959277
|
||||
346ffffffffffeef 480ffffeffffffe0 3fdfffffffffffff 3fdfffffffffffff 3fe0000000000000 Wrong 4962961
|
||||
c01fffffffffffff 0007ffffffff0000 8000000000000000 803ffffffffdffff 802ffffffffbffff Wrong ydenorm 5176633
|
||||
c01fffffffffffff bfc08000000fffff 434ffffffffffffe 434ffffffffffffe 434fffffffffffff Wrong 5193211
|
||||
c3a000000fffff7f 80000000000005fe 001000003ffffbff 03b0000010000b7b 0127f80817f81f3f Wrong ydenorm 5450477
|
||||
0012000000000001 4000000000000001 000909a97b1f06a1 0028426a5ec7c1aa 002684d4bd8f8353 Wrong zdenorm 5535209
|
||||
ffe0000000000000 8000000000000001 c03000000000003f c02e00000000007e c03000000000003f Wrong ydenorm 5621169
|
||||
ffe0000000000001 3ca0c6fe6997e5e2 7fefffffffffffff fca8637f34cbf2f2 7feffffffffffffe Wrong 5673973
|
||||
ffe0000000000001 800fffffffffffff c340000000000001 4340000000000000 c340000000000000 Wrong ydenorm 5691779
|
||||
43f4595959dece4b 8000000000000001 801fffffffffffff 8404595959dece4e 80d45b5959dece4b Wrong ydenorm 5760547
|
||||
ffefffffffffffff 3ca14e19e3a06f13 7fe00000000ff7fe ffdfffffffe01006 7fe00000000ff7fd Wrong 5783265
|
||||
ffeffffffffffffe 8000000000000001 000fffffffffffff 4000000000000001 3ccffffffffffffe Wrong ydenorm zdenorm 5829929
|
||||
ffeffffffffffffe 800001fffbffffff bac0000ffeffffff 400003fff7fffffd 3f5fffbfffffeffe Wrong ydenorm 5832999
|
||||
bca0000004000080 bff0000000000009 bff0000000000001 3fefffffffffffff bff0000000000000 Wrong 5841595
|
||||
3fffffffff9ffffe 800000000f7ffffe 800ffdffbffffffe 801ffefffecffffa 800ffdffdefffffa Wrong ydenorm zdenorm 5887031
|
||||
41ccc32b421f1ac0 8000000000000001 802ffffc0000001e 81dcc32b461f1a44 802ffffc1cc32b60 Wrong ydenorm 5899925
|
||||
41ffffffffffff87 8000000000000001 0000000000000000 820fffffffffff8b 8000000200000000 Wrong ydenorm 6039335
|
||||
|
||||
Binary file not shown.
@ -14,24 +14,31 @@ void main() {
|
||||
fp = fopen("testFloat","r");
|
||||
fq = fopen("tb.v","a");
|
||||
system("cp tbhead.v tb.v");
|
||||
int k=0;
|
||||
for(k=0; k<91 && !feof(fp); k++) {
|
||||
long k=0L;
|
||||
for(; !feof(fp); k++) {
|
||||
//3FDBFFFFFFFFFF7F DE608000000001FF 43CFED83C17EDBD0 DE4CE000000002F9 01
|
||||
// b68ffff8000000ff_3f9080000007ffff_b6307ffbe0080080_00001
|
||||
char ch;
|
||||
int i,j;
|
||||
char *ln;
|
||||
char ch;
|
||||
int i,j,n;
|
||||
char xrf[17];
|
||||
char y[17];
|
||||
char zrf[17];
|
||||
char ans[81];
|
||||
char flags[3];
|
||||
int rn,rz,rm,rp;
|
||||
{
|
||||
//my_string = (char *) malloc (nbytes + 1);
|
||||
//bytes_read = getline (&my_string, &nbytes, stdin);
|
||||
if(getline(&ln,&nbytes,fp) < 0) break;
|
||||
//fprintf(stderr,"%s\n", ln);
|
||||
long stop = 6039335;
|
||||
int debug = 0;
|
||||
//my_string = (char *) malloc (nbytes + 1);
|
||||
//bytes_read = getline (&my_string, &nbytes, stdin);
|
||||
|
||||
for(n=0; n < 613; n++) {//613 for 10000
|
||||
if(getline(&ln,&nbytes,fp) < 0 || feof(fp)) break;
|
||||
if(k == stop && debug == 1) break;
|
||||
k++;
|
||||
}
|
||||
//fprintf(stderr,"%s\n", ln);
|
||||
|
||||
if(!feof(fp)) {
|
||||
|
||||
strncpy(xrf, ln, 16); xrf[16]=0;
|
||||
strncpy(y, &ln[17], 16); y[16]=0;
|
||||
@ -46,71 +53,80 @@ void main() {
|
||||
fprintf(fq," zrf = 64'h%s;\n",zrf);
|
||||
fprintf(fq," ans = 64'h%s;\n", ans);
|
||||
// fprintf(fq," flags = 5'h%s;\n", flags);
|
||||
}
|
||||
|
||||
|
||||
{
|
||||
//rn=1; rz=0; rm=0; rp=0;
|
||||
fprintf(fq," rn = %d;\n",1);
|
||||
fprintf(fq," rz = %d;\n", 0);
|
||||
fprintf(fq," rm = %d;\n", 0);
|
||||
fprintf(fq," rp = %d;\n", 0);
|
||||
}
|
||||
{
|
||||
fprintf(fq," earlyres = 64'b0;\n");
|
||||
fprintf(fq," earlyressel = 0;\n");
|
||||
}
|
||||
{
|
||||
{
|
||||
//rn=1; rz=0; rm=0; rp=0;
|
||||
fprintf(fq," rn = %d;\n",1);
|
||||
fprintf(fq," rz = %d;\n", 0);
|
||||
fprintf(fq," rm = %d;\n", 0);
|
||||
fprintf(fq," rp = %d;\n", 0);
|
||||
}
|
||||
{
|
||||
fprintf(fq," earlyres = 64'b0;\n");
|
||||
fprintf(fq," earlyressel = 0;\n");
|
||||
}
|
||||
{
|
||||
|
||||
fprintf(fq," bypsel= 2'b0;\n"); //, bysel);
|
||||
fprintf(fq," bypplus1 = 0;\n"); //, byp1);
|
||||
fprintf(fq," byppostnorm = 0;\n"); //, bypnorm);
|
||||
}
|
||||
fprintf(fq,"#10\n");
|
||||
// IEEE 754-2008 section 6.3 states "When ether an input or result is NaN, this standard does not interpret the sign of a NaN."
|
||||
//fprintf(fq," $fwrite(fp, \"%%h %%h %%h %%h \",xrf,y,w, ans);\n");
|
||||
fprintf(fq," // IEEE 754-2008 section 6.3 states: \"When ether an input or result is NaN, this\n");
|
||||
fprintf(fq," // standard does not interpret the sign of a NaN.\"\n");
|
||||
fprintf(fq," nan = (w > 64'h7FF0000000000000 && w < 64'h7FF8000000000000) ||\n");
|
||||
fprintf(fq," (w > 64'hFFF8000000000000 && w < 64'hFFF8000000000000 ) ||\n");
|
||||
fprintf(fq," (w >= 64'h7FF8000000000000 && w <= 64'h7FFfffffffffffff ) ||\n");
|
||||
fprintf(fq," (w >= 64'hFFF8000000000000 && w <= 64'hFFFfffffffffffff );\n");
|
||||
// fprintf(fq," if(!(~(|xrf[62:52]) && |xrf[51:0] || ~(|y[62:52]) && |y[51:0])) begin\n");
|
||||
// not looknig at negative zero results right now
|
||||
//fprintf(fq," if( (nan && (w[62:0] != ans[62:0])) || (!nan && (w != ans)) && !(w == 64'h8000000000000000 && ans == 64'b0)) begin\n");
|
||||
fprintf(fq," if( (nan && (w[62:0] != ans[62:0])) || (!nan && (w != ans)) ) begin\n");
|
||||
fprintf(fq," $fwrite(fp, \"%%h %%h %%h %%h %%h Wrong \",xrf,y, zrf, w, ans);\n");
|
||||
fprintf(fq," if(w == 64'h8000000000000000) $fwrite(fp, \"w=-zero \");\n");
|
||||
fprintf(fq," if(~(|xrf[62:52]) && |xrf[51:0]) $fwrite(fp, \"xdenorm \");\n");
|
||||
fprintf(fq," if(~(|y[62:52]) && |y[51:0]) $fwrite(fp, \"ydenorm \");\n");
|
||||
fprintf(fq," if(~(|zrf[62:52]) && |zrf[51:0]) $fwrite(fp, \"zdenorm \");\n");
|
||||
fprintf(fq," if(invalid != 0) $fwrite(fp, \"invld \");\n");
|
||||
fprintf(fq," if(overflow != 0) $fwrite(fp, \"ovrflw \");\n");
|
||||
fprintf(fq," if(underflow != 0) $fwrite(fp, \"unflw \");\n");
|
||||
fprintf(fq," if(w == 64'hFFF0000000000000) $fwrite(fp, \"w=-inf \");\n");
|
||||
fprintf(fq," if(w == 64'h7FF0000000000000) $fwrite(fp, \"w=+inf \");\n");
|
||||
fprintf(fq," if(w > 64'h7FF0000000000000 && w < 64'h7FF8000000000000 ) $fwrite(fp, \"w=sigNaN \");\n");
|
||||
fprintf(fq," if(w > 64'hFFF8000000000000 && w < 64'hFFF8000000000000 ) $fwrite(fp, \"w=sigNaN \");\n");
|
||||
fprintf(fq," if(w >= 64'h7FF8000000000000 && w <= 64'h7FFfffffffffffff ) $fwrite(fp, \"w=qutNaN \");\n");
|
||||
fprintf(fq," if(w >= 64'hFFF8000000000000 && w <= 64'hFFFfffffffffffff ) $fwrite(fp, \"w=qutNaN \");\n");
|
||||
fprintf(fq," bypsel= 2'b0;\n"); //, bysel);
|
||||
fprintf(fq," bypplus1 = 0;\n"); //, byp1);
|
||||
fprintf(fq," byppostnorm = 0;\n"); //, bypnorm);
|
||||
}
|
||||
fprintf(fq,"#10\n");
|
||||
// IEEE 754-2008 section 6.3 states "When ether an input or result is NaN, this standard does not interpret the sign of a NaN."
|
||||
//fprintf(fq," $fwrite(fp, \"%%h %%h %%h %%h \",xrf,y,w, ans);\n");
|
||||
fprintf(fq," // IEEE 754-2008 section 6.3 states: \"When ether an input or result is NaN, this\n");
|
||||
fprintf(fq," // standard does not interpret the sign of a NaN.\"\n");
|
||||
fprintf(fq," wnan = &w[62:52] && |w[51:0]; \n");
|
||||
fprintf(fq," xnan = &xrf[62:52] && |xrf[51:0]; \n");
|
||||
fprintf(fq," ynan = &y[62:52] && |y[51:0]; \n");
|
||||
fprintf(fq," znan = &zrf[62:52] && |zrf[51:0]; \n");
|
||||
fprintf(fq," ansnan = &ans[62:52] && |ans[51:0]; \n");
|
||||
fprintf(fq," xnorm = ~(|xrf[62:52]) && |xrf[51:0] ? {xrf[50:0], 1'b0} : xrf; \n");
|
||||
fprintf(fq," ynorm = ~(|y[62:52]) && |y[51:0] ? {y[50:0], 1'b0} : y;\n");
|
||||
fprintf(fq," s = ({54'b1,xnorm} + (bypsel && bypplus1)) * {54'b1,ynorm}; \n");
|
||||
// fprintf(fq," if(!(~(|xrf[62:52]) && |xrf[51:0] || ~(|y[62:52]) && |y[51:0])) begin\n");
|
||||
// not looknig at negative zero results right now
|
||||
//fprintf(fq," if( (nan && (w[62:0] != ans[62:0])) || (!nan && (w != ans)) && !(w == 64'h8000000000000000 && ans == 64'b0)) begin\n");
|
||||
// fprintf(fq," if( (nan && (w[62:0] != ans[62:0])) || (!nan && (w != ans)) ) begin\n");
|
||||
fprintf(fq," if((!wnan && (w != ans)) || (wnan && ansnan && ~(((xnan && (w[62:0] == {xrf[62:52],1'b1,xrf[50:0]})) || (ynan && (w[62:0] == {y[62:52],1'b1,y[50:0]})) || (znan && (w[62:0] == {zrf[62:52],1'b1,zrf[50:0]})) || (w[62:0] == ans[62:0])) ))) begin\n");
|
||||
fprintf(fq," $fwrite(fp, \"%%h %%h %%h %%h %%h Wrong \",xrf,y, zrf, w, ans);\n");
|
||||
//fprintf(fq," $fwrite(fp, \"%%h \",s);\n");
|
||||
fprintf(fq," if(w == 64'h8000000000000000) $fwrite(fp, \"w=-zero \");\n");
|
||||
fprintf(fq," if(~(|xrf[62:52]) && |xrf[51:0]) $fwrite(fp, \"xdenorm \");\n");
|
||||
fprintf(fq," if(~(|y[62:52]) && |y[51:0]) $fwrite(fp, \"ydenorm \");\n");
|
||||
fprintf(fq," if(~(|zrf[62:52]) && |zrf[51:0]) $fwrite(fp, \"zdenorm \");\n");
|
||||
fprintf(fq," if(invalid != 0) $fwrite(fp, \"invld \");\n");
|
||||
fprintf(fq," if(overflow != 0) $fwrite(fp, \"ovrflw \");\n");
|
||||
fprintf(fq," if(underflow != 0) $fwrite(fp, \"unflw \");\n");
|
||||
fprintf(fq," if(w == 64'hFFF0000000000000) $fwrite(fp, \"w=-inf \");\n");
|
||||
fprintf(fq," if(w == 64'h7FF0000000000000) $fwrite(fp, \"w=+inf \");\n");
|
||||
fprintf(fq," if(w > 64'h7FF0000000000000 && w < 64'h7FF8000000000000 ) $fwrite(fp, \"w=sigNaN \");\n");
|
||||
fprintf(fq," if(w > 64'hFFF8000000000000 && w < 64'hFFF8000000000000 ) $fwrite(fp, \"w=sigNaN \");\n");
|
||||
fprintf(fq," if(w >= 64'h7FF8000000000000 && w <= 64'h7FFfffffffffffff ) $fwrite(fp, \"w=qutNaN \");\n");
|
||||
fprintf(fq," if(w >= 64'hFFF8000000000000 && w <= 64'hFFFfffffffffffff ) $fwrite(fp, \"w=qutNaN \");\n");
|
||||
|
||||
fprintf(fq," if(ans == 64'hFFF0000000000000) $fwrite(fp, \"ans=-inf \");\n");
|
||||
fprintf(fq," if(ans == 64'h7FF0000000000000) $fwrite(fp, \"ans=+inf \");\n");
|
||||
fprintf(fq," if(ans > 64'h7FF0000000000000 && ans < 64'h7FF8000000000000 ) $fwrite(fp, \"ans=sigNaN \");\n");
|
||||
fprintf(fq," if(ans > 64'hFFF8000000000000 && ans < 64'hFFF8000000000000 ) $fwrite(fp, \"ans=sigNaN \");\n");
|
||||
fprintf(fq," if(ans >= 64'h7FF8000000000000 && ans <= 64'h7FFfffffffffffff ) $fwrite(fp, \"ans=qutNaN \");\n");
|
||||
fprintf(fq," if(ans >= 64'hFFF8000000000000 && ans <= 64'hFFFfffffffffffff ) $fwrite(fp, \"ans=qutNaN \");\n");
|
||||
fprintf(fq," $fwrite(fp,\"%d\\n\");\n",cnt);
|
||||
if(cnt == 358)fprintf(fq," $stop;\n");
|
||||
// fprintf(fq," end\n");
|
||||
fprintf(fq," end\n");
|
||||
cnt++;
|
||||
fprintf(fq," if(ans == 64'hFFF0000000000000) $fwrite(fp, \"ans=-inf \");\n");
|
||||
fprintf(fq," if(ans == 64'h7FF0000000000000) $fwrite(fp, \"ans=+inf \");\n");
|
||||
fprintf(fq," if(ans > 64'h7FF0000000000000 && ans < 64'h7FF8000000000000 ) $fwrite(fp, \"ans=sigNaN \");\n");
|
||||
fprintf(fq," if(ans > 64'hFFF8000000000000 && ans < 64'hFFF8000000000000 ) $fwrite(fp, \"ans=sigNaN \");\n");
|
||||
fprintf(fq," if(ans >= 64'h7FF8000000000000 && ans <= 64'h7FFfffffffffffff ) $fwrite(fp, \"ans=qutNaN \");\n");
|
||||
fprintf(fq," if(ans >= 64'hFFF8000000000000 && ans <= 64'hFFFfffffffffffff ) $fwrite(fp, \"ans=qutNaN \");\n");
|
||||
fprintf(fq," $fwrite(fp,\"%ld\\n\");\n",k);
|
||||
//fprintf(fq," $stop;\n");
|
||||
// fprintf(fq," end\n");
|
||||
fprintf(fq," end\n");
|
||||
cnt++;
|
||||
|
||||
//if(cnt > 100) break;
|
||||
fflush(fq);
|
||||
}
|
||||
//if(cnt > 100) break;
|
||||
fflush(fq);
|
||||
} // if(!feof(fp))
|
||||
if(k == stop && debug == 1) break;
|
||||
} // for(k)
|
||||
|
||||
fprintf(fq, "\t$stop;\n\tend\nendmodule");
|
||||
fclose(fq);
|
||||
fclose(fp);
|
||||
fprintf(stdout,"cnt = %d\n",cnt);
|
||||
}
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -23,7 +23,14 @@ module tb;
|
||||
wire inexact;
|
||||
|
||||
integer fp;
|
||||
reg nan;
|
||||
reg wnan;
|
||||
reg xnan;
|
||||
reg ynan;
|
||||
reg znan;
|
||||
reg ansnan;
|
||||
reg [105:0] s; // partial product 2
|
||||
reg [51:0] xnorm;
|
||||
reg [51:0] ynorm;
|
||||
|
||||
localparam period = 20;
|
||||
fmac UUT(.xrf(xrf), .y(y), .zrf(zrf), .rn(rn), .rz(rz), .rp(rp), .rm(rm),
|
||||
@ -33,4 +40,4 @@ fmac UUT(.xrf(xrf), .y(y), .zrf(zrf), .rn(rn), .rz(rz), .rp(rp), .rm(rm),
|
||||
|
||||
initial
|
||||
begin
|
||||
fp = $fopen("/home/kparry/code/FMAC/tbgen/results.dat","w");
|
||||
fp = $fopen("/home/kparry/riscv-wally/wally-pipelined/src/fpu/FMA/tbgen/results.dat","w");
|
||||
|
||||
Loading…
Reference in New Issue
Block a user