forked from Github_Repos/cvw
Removed unnecessary configuration conditions from subwordread sign extension/NaN boxing
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@ -85,19 +85,10 @@ module subwordread
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always_comb
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case(Funct3M)
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3'b000: ReadDataM = {{`LLEN-8{ByteM[7]}}, ByteM}; // lb
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3'b001: if(`ZFH_SUPPORTED)
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ReadDataM = {{`LLEN-16{HalfwordM[15]|FpLoadStoreM}}, HalfwordM[15:0]}; // lh/flh
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else ReadDataM = {{`LLEN-16{HalfwordM[15]}}, HalfwordM[15:0]}; // lh
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3'b010: if(`F_SUPPORTED)
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ReadDataM = {{`LLEN-32{WordM[31]|FpLoadStoreM}}, WordM[31:0]}; // lw/flw
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else ReadDataM = {{`LLEN-32{WordM[31]}}, WordM[31:0]}; // lw
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3'b011: if(`D_SUPPORTED)
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ReadDataM = {{`LLEN-64{DblWordM[63]|FpLoadStoreM}}, DblWordM[63:0]}; // ld/fld
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else ReadDataM = {{`LLEN-64{DblWordM[63]}}, DblWordM[63:0]}; // ld/fld
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3'b100: if(`Q_SUPPORTED)
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ReadDataM = FpLoadStoreM ? ReadDataWordMuxM : {{`LLEN-8{1'b0}}, ByteM[7:0]}; // lbu/flq
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else
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ReadDataM = {{`LLEN-8{1'b0}}, ByteM[7:0]}; // lbu
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3'b001: ReadDataM = {{`LLEN-16{HalfwordM[15]|FpLoadStoreM}}, HalfwordM[15:0]}; // lh/flh
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3'b010: ReadDataM = {{`LLEN-32{WordM[31]|FpLoadStoreM}}, WordM[31:0]}; // lw/flw
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3'b011: ReadDataM = {{`LLEN-64{DblWordM[63]|FpLoadStoreM}}, DblWordM[63:0]}; // ld/fld
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3'b100: ReadDataM = FpLoadStoreM ? ReadDataWordMuxM : {{`LLEN-8{1'b0}}, ByteM[7:0]}; // lbu/flq
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3'b101: ReadDataM = {{`LLEN-16{1'b0}}, HalfwordM[15:0]}; // lhu
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3'b110: ReadDataM = {{`LLEN-32{1'b0}}, WordM[31:0]}; // lwu
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default: ReadDataM = ReadDataWordMuxM; // Shouldn't happen
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@ -124,12 +115,8 @@ module subwordread
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always_comb
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case(Funct3M)
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3'b000: ReadDataM = {{`LLEN-8{ByteM[7]}}, ByteM}; // lb
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3'b001: if(`ZFH_SUPPORTED)
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ReadDataM = {{`LLEN-16{HalfwordM[15]|FpLoadStoreM}}, HalfwordM[15:0]}; // lh/flh
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else ReadDataM = {{`LLEN-16{HalfwordM[15]}}, HalfwordM[15:0]}; // lh
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3'b010: if(`F_SUPPORTED)
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ReadDataM = {{`LLEN-32{ReadDataWordMuxM[31]|FpLoadStoreM}}, ReadDataWordMuxM[31:0]}; // lw/flw
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else ReadDataM = {{`LLEN-32{ReadDataWordMuxM[31]}}, ReadDataWordMuxM[31:0]}; // lw
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3'b001: ReadDataM = {{`LLEN-16{HalfwordM[15]|FpLoadStoreM}}, HalfwordM[15:0]}; // lh/flh
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3'b010: ReadDataM = {{`LLEN-32{ReadDataWordMuxM[31]|FpLoadStoreM}}, ReadDataWordMuxM[31:0]}; // lw/flw
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3'b011: ReadDataM = ReadDataWordMuxM; // fld
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3'b100: ReadDataM = {{`LLEN-8{1'b0}}, ByteM[7:0]}; // lbu
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3'b101: ReadDataM = {{`LLEN-16{1'b0}}, HalfwordM[15:0]}; // lhu
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@ -414,5 +414,6 @@ module wallypipelinedcore (
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assign FDivBusyE = 0;
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assign IllegalFPUInstrM = 1;
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assign SetFflagsM = 0;
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assign FpLoadStoreM = 0;
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end
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endmodule
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