forked from Github_Repos/cvw
busybear: ret is only 1 word
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@ -130,6 +130,6 @@ add wave /testbench_busybear/InstrWName
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#set DefaultRadix hexadecimal
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#
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#-- Run the Simulation
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run 2630
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run 2640
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#run -all
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##quit
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@ -158,8 +158,11 @@ module testbench_busybear();
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$stop;
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end
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// first read instruction
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scan_file_PC = $fscanf(data_file_PC, "%s %s\n", PCtext, PCtext2);
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PCtext = {PCtext, " ", PCtext2};
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scan_file_PC = $fscanf(data_file_PC, "%s\n", PCtext);
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if (PCtext != "ret") begin
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scan_file_PC = $fscanf(data_file_PC, "%s\n", PCtext2);
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PCtext = {PCtext, " ", PCtext2};
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end
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scan_file_PC = $fscanf(data_file_PC, "%x\n", InstrF);
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// then expected PC value
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scan_file_PC = $fscanf(data_file_PC, "%x\n", pcExpected);
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