forked from Github_Repos/cvw
Restored performance counter reports.
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@ -169,7 +169,8 @@ logic [3:0] dummy;
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logic InitializingMemories;
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integer ResetCount, ResetThreshold;
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logic InReset;
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logic Begin;
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// instantiate device to be tested
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assign GPIOIN = 0;
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assign UARTSin = 1;
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@ -417,7 +418,7 @@ logic [3:0] dummy;
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if(`PrintHPMCounters & `ZICOUNTERS_SUPPORTED) begin : HPMCSample
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integer HPMCindex;
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logic StartSampleFirst;
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logic StartSampleDelayed;
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logic StartSampleDelayed, BeginDelayed;
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logic EndSampleFirst, EndSampleDelayed;
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logic [`XLEN-1:0] InitialHPMCOUNTERH[`COUNTERS-1:0];
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@ -474,10 +475,13 @@ logic [3:0] dummy;
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// default start condiction is reset
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// default end condiction is end of test (DCacheFlushDone)
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assign StartSampleFirst = InReset;
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flop #(1) StartSampleReg(clk, StartSampleFirst, StartSampleDelayed);
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flopr #(1) StartSampleReg(clk, reset, StartSampleFirst, StartSampleDelayed);
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assign StartSample = StartSampleFirst & ~ StartSampleDelayed;
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assign EndSample = DCacheFlushStart & ~DCacheFlushDone;
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flop #(1) BeginReg(clk, StartSampleFirst, BeginDelayed);
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assign Begin = StartSampleFirst & ~ BeginDelayed;
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end
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always @(negedge clk) begin
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@ -566,7 +570,7 @@ end
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end
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always @(posedge clk) begin
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if(resetEdge) $fwrite(file, "TRAIN\n");
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if(StartSample) $fwrite(file, "BEGIN %s\n", memfilename);
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if(Begin) $fwrite(file, "BEGIN %s\n", memfilename);
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if(Enable) begin // only log i cache reads
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$fwrite(file, "%h R\n", dut.core.ifu.PCPF);
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end
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@ -587,7 +591,7 @@ end
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end
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always @(posedge clk) begin
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if(resetEdge) $fwrite(file, "TRAIN\n");
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if(StartSample) $fwrite(file, "BEGIN %s\n", memfilename);
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if(Begin) $fwrite(file, "BEGIN %s\n", memfilename);
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if(~dut.core.StallW & ~dut.core.FlushW & dut.core.InstrValidM) begin
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if(dut.core.lsu.bus.dcache.CacheRWM == 2'b10) begin
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$fwrite(file, "%h R\n", dut.core.lsu.PAdrM);
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