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Query about CondExtA

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David Harris 2023-03-24 08:35:33 -07:00
parent 34e0b3bc61
commit 9f1c1958a6
1 changed files with 2 additions and 2 deletions
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src/ieu/alu.sv
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@ -52,9 +52,9 @@ module alu #(parameter WIDTH=32) (
logic LT, LTU; // Less than, Less than unsigned logic LT, LTU; // Less than, Less than unsigned
logic Asign, Bsign; // Sign bits of A, B logic Asign, Bsign; // Sign bits of A, B
// A, A sign bit muxes // *** explain this part better; possibly move into shifter and BMU?
if (WIDTH == 64) begin if (WIDTH == 64) begin
mux3 #(64) extendmux({{32{1'b0}}, A[31:0]},{{32{A[31]}}, A[31:0]}, A, {~W64, SubArith}, CondExtA); // bottom 32 bits are always A[31:0], so effectively a 32-bit upper mux mux3 #(64) extendmux({{32{1'b0}}, A[31:0]}, {{32{A[31]}}, A[31:0]}, A, {~W64, SubArith}, CondExtA); // bottom 32 bits are always A[31:0], so effectively a 32-bit upper mux
end else begin end else begin
assign CondExtA = A; assign CondExtA = A;
end end