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Added logic to make burst optional.

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This commit is contained in:
Ross Thompson 2022-09-06 09:21:21 -05:00
parent fcf72bb6ba
commit 99e3f55637
1 changed files with 4 additions and 5 deletions
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9
pipelined/src/ebu/buscachefsm.sv
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@ -29,6 +29,7 @@
//////////////////////////////////////////////////////////////////////////////////////////////// ////////////////////////////////////////////////////////////////////////////////////////////////
`include "wally-config.vh" `include "wally-config.vh"
`define BURST_EN 1
// HCLK and clk must be the same clock! // HCLK and clk must be the same clock!
module buscachefsm #(parameter integer WordCountThreshold, module buscachefsm #(parameter integer WordCountThreshold,
@ -136,12 +137,10 @@ module buscachefsm #(parameter integer WordCountThreshold,
// AHB bus interface // AHB bus interface
assign HTRANS = (CurrState == ADR_PHASE & HREADY & (|RW | |CacheRW)) | assign HTRANS = (CurrState == ADR_PHASE & HREADY & (|RW | |CacheRW)) |
(CurrState == DATA_PHASE & ~HREADY) ? AHB_NONSEQ : (CurrState == DATA_PHASE & ~HREADY) ? AHB_NONSEQ :
// (CacheAccess & |WordCount) ? AHB_SEQ : AHB_IDLE; /// this line is for burst (CacheAccess & |WordCount) ? (`BURST_EN ? AHB_SEQ : AHB_NONSEQ) : AHB_IDLE;
(CacheAccess & |WordCount) ? AHB_NONSEQ : AHB_IDLE;
assign HWRITE = RW[0] | CacheRW[0]; assign HWRITE = RW[0] | CacheRW[0];
// assign HBURST = (|CacheRW) ? LocalBurstType : 3'b0; // this line is for burst. assign HBURST = `BURST_EN ? ((|CacheRW) ? LocalBurstType : 3'b0) : 3'b0; // this line is for burst.
// try disabling burst as it is not working with the fpga.
assign HBURST = 3'b0;
always_comb begin always_comb begin
case(WordCountThreshold) case(WordCountThreshold)