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Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main

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This commit is contained in:
Ross Thompson 2021-06-18 12:24:42 -05:00
commit 99e3a0db28
3 changed files with 17 additions and 22 deletions
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5
wally-pipelined/config/coremark_bare/wally-config.vh
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@ -52,6 +52,9 @@
`define ITLB_ENTRY_BITS 5 `define ITLB_ENTRY_BITS 5
`define DTLB_ENTRY_BITS 5 `define DTLB_ENTRY_BITS 5
// Legal number of PMP entries are 0, 16, or 64
`define PMP_ENTRIES 16
// Address space // Address space
`define RESET_VECTOR 64'h0000000080000000 `define RESET_VECTOR 64'h0000000080000000
@ -101,7 +104,7 @@
`define PLIC_GPIO_ID 3 `define PLIC_GPIO_ID 3
`define PLIC_UART_ID 4 `define PLIC_UART_ID 4
/`define TWO_BIT_PRELOAD "../config/coremark_bare/twoBitPredictor.txt" `define TWO_BIT_PRELOAD "../config/coremark_bare/twoBitPredictor.txt"
`define BTB_PRELOAD "../config/coremark_bare/BTBPredictor.txt" `define BTB_PRELOAD "../config/coremark_bare/BTBPredictor.txt"
`define BPRED_ENABLED 1 `define BPRED_ENABLED 1
`define BPTYPE "BPGSHARE"//comments `define BPTYPE "BPGSHARE"//comments

2
wally-pipelined/regression/wally-busybear.do
View File

@ -35,7 +35,7 @@ vopt +acc work.testbench -o workopt
vsim workopt -suppress 8852,12070 vsim workopt -suppress 8852,12070
#do ./wave-dos/linux-waves.do do ./wave-dos/linux-waves.do
#-- Run the Simulation #-- Run the Simulation

32
wally-pipelined/testbench/testbench-linux.sv
View File

@ -474,18 +474,18 @@ module testbench();
end end
string PCtextD,PCtextE,PCtextM,PCtext2; string PCtextD,PCtextE,PCtextM,PCtext2;
always_ff @(posedge clk, posedge reset) //always_ff @(posedge clk, posedge reset)
if (reset) begin // if (reset) begin
PCtextE <= #1 "(reset)"; // PCtextE <= #1 "(reset)";
PCtextM <= #1 "(reset)"; // PCtextM <= #1 "(reset)";
end else begin // end else begin
if (~dut.hart.StallE) // if (~dut.hart.StallE)
if (dut.hart.FlushE) PCtextE <= #1 "(flushed)"; // if (dut.hart.FlushE) PCtextE <= #1 "(flushed)";
else PCtextE <= #1 PCtextD; // else PCtextE <= #1 PCtextD;
if (~dut.hart.StallM) // if (~dut.hart.StallM)
if (dut.hart.FlushM) PCtextM <= #1 "(flushed)"; // if (dut.hart.FlushM) PCtextM <= #1 "(flushed)";
else PCtextM <= #1 PCtextE; // else PCtextM <= #1 PCtextE;
end // end
initial begin initial begin
@ -498,10 +498,8 @@ module testbench();
always @(dut.hart.ifu.PCD or dut.hart.ifu.InstrRawD or reset or negedge dut.hart.ifu.StallE) begin always @(dut.hart.ifu.PCD or dut.hart.ifu.InstrRawD or reset or negedge dut.hart.ifu.StallE) begin
if(~HWRITE) begin if(~HWRITE) begin
#2; #2;
$display("test point");
if (~reset && dut.hart.ifu.InstrRawD[15:0] !== {16{1'bx}} && dut.hart.ifu.PCD !== 64'h0 && ~dut.hart.ifu.StallE) begin if (~reset && dut.hart.ifu.InstrRawD[15:0] !== {16{1'bx}} && dut.hart.ifu.PCD !== 64'h0 && ~dut.hart.ifu.StallE) begin
if (dut.hart.ifu.PCD !== lastPCD) begin if (dut.hart.ifu.PCD !== lastPCD) begin
$display("tp2");
lastCheckInstrD = CheckInstrD; lastCheckInstrD = CheckInstrD;
lastPC <= dut.hart.ifu.PCD; lastPC <= dut.hart.ifu.PCD;
lastPC2 <= lastPC; lastPC2 <= lastPC;
@ -528,22 +526,16 @@ module testbench();
end end
end end
else begin else begin
$display("tp4");
if($feof(data_file_PC)) begin if($feof(data_file_PC)) begin
$display("no more PC data to read"); $display("no more PC data to read");
`ERROR `ERROR
end end
scan_file_PC = $fscanf(data_file_PC, "%s\n", PCtextD); scan_file_PC = $fscanf(data_file_PC, "%s\n", PCtextD);
PCtext2 = ""; PCtext2 = "";
$display("tp5 PCtextD = %s PCtext2 = %s\n", PCtextD, PCtext2);
while (PCtext2 != "***") begin while (PCtext2 != "***") begin
$display("tp6 PCtextD = %s PCtext2 = %s\n", PCtextD, PCtext2);
PCtextD = {PCtextD, " ", PCtext2}; PCtextD = {PCtextD, " ", PCtext2};
$display("tp8");
scan_file_PC = $fscanf(data_file_PC, "%s\n", PCtext2); scan_file_PC = $fscanf(data_file_PC, "%s\n", PCtext2);
$display("tp9");
end end
$display("tp7 PCtextD = %s PCtext2 = %s\n", PCtextD, PCtext2);
scan_file_PC = $fscanf(data_file_PC, "%x\n", CheckInstrD); scan_file_PC = $fscanf(data_file_PC, "%x\n", CheckInstrD);
if(dut.hart.ifu.PCD === pcExpected) begin if(dut.hart.ifu.PCD === pcExpected) begin
if((dut.hart.ifu.InstrRawD[6:0] == 7'b1010011) || // for now, NOP out any float instrs if((dut.hart.ifu.InstrRawD[6:0] == 7'b1010011) || // for now, NOP out any float instrs