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Further comments and attribution.

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Limnanthes Serafini 2023-04-05 02:46:31 -07:00
parent c42d798ff4
commit 98a56dcd66
2 changed files with 30 additions and 4 deletions
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7
bin/CacheSim.py
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@ -1,7 +1,7 @@
#!/usr/bin/env python3 #!/usr/bin/env python3
########################################### ###########################################
## testcount.pl ## CacheSim.py
## ##
## Written: lserafini@hmc.edu ## Written: lserafini@hmc.edu
## Created: 27 March 2023 ## Created: 27 March 2023
@ -33,8 +33,9 @@
# the log files to run this simulator on can be generated from testbench.sv # the log files to run this simulator on can be generated from testbench.sv
# by setting I_CACHE_ADDR_LOGGER and/or D_CACHE_ADDR_LOGGER to 1 before running tests. # by setting I_CACHE_ADDR_LOGGER and/or D_CACHE_ADDR_LOGGER to 1 before running tests.
# I (Lim) recommend logging a single set of tests (such as wally64priv) at a time. # I (Lim) recommend logging a single set of tests (such as wally64priv) at a time.
# with verbose mode off, the simulator only reports mismatches between its and Wally's behavior. # This helps avoid unexpected logger behavior.
# with verbose mode on, the simulator logs each access into the cache. # With verbose mode off, the simulator only reports mismatches between its and Wally's behavior.
# With verbose mode on, the simulator logs each access into the cache.
import sys import sys
import math import math

27
tests/custom/cacheSimTest/CacheSimTest.py
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#!/usr/bin/env python3 #!/usr/bin/env python3
# Authors: Limnanthes Serafini (lserafini@hmc.edu) and Alec Vercruysse (avercruysse@hmc.edu) ###########################################
## CacheSimTest.py
##
## Written: lserafini@hmc.edu
## Created: 4 April 2023
## Modified: 5 April 2023
##
## Purpose: Confirm that the cache simulator behaves as expected.
##
## A component of the CORE-V-WALLY configurable RISC-V project.
##
## Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
##
## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
##
## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
## except in compliance with the License, or, at your option, the Apache License version 2.0. You
## may obtain a copy of the License at
##
## https:##solderpad.org/licenses/SHL-2.1/
##
## Unless required by applicable law or agreed to in writing, any work distributed under the
## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
## either express or implied. See the License for the specific language governing permissions
## and limitations under the License.
################################################################################################
import sys import sys
import os import os