forked from Github_Repos/cvw
dot stars conversions on the rest of the testbenches
This commit is contained in:
parent
1a82b50483
commit
98420cb988
@ -64,7 +64,10 @@ module testbench();
|
||||
assign HREADYEXT = 1;
|
||||
assign HRESPEXT = 0;
|
||||
assign HRDATAEXT = 0;
|
||||
wallypipelinedsoc dut(.*);
|
||||
wallypipelinedsoc dut(.clk, .reset_ext, .HRDATAEXT,.HREADYEXT, .HRESPEXT,.HSELEXT,
|
||||
.HCLK, .HRESETn, .HADDR, .HWDATA, .HWRITE, .HSIZE, .HBURST, .HPROT,
|
||||
.HTRANS, .HMASTLOCK, .HREADY, .GPIOPinsIn, .GPIOPinsOut, .GPIOPinsEn,
|
||||
.UARTSin, .UARTSout, .SDCCmdIn, .SDCCmdOut, .SDCCmdOE, .SDCDatIn, .SDCCLK);
|
||||
// Track names of instructions
|
||||
logic [31:0] InstrW;
|
||||
flopenr #(32) InstrWReg(clk, reset, ~dut.hart.ieu.dp.StallW, dut.hart.ifu.InstrM, InstrW);
|
||||
|
@ -72,29 +72,10 @@ module testbench();
|
||||
assign HREADYEXT = 1;
|
||||
assign HRESPEXT = 0;
|
||||
assign HRDATAEXT = 0;
|
||||
wallypipelinedsoc dut(.clk, .reset_ext,
|
||||
.HRDATAEXT,
|
||||
.HREADYEXT, .HRESPEXT,
|
||||
.HSELEXT,
|
||||
.HCLK, .HRESETn,
|
||||
.HADDR,
|
||||
.HWDATA,
|
||||
.HWRITE,
|
||||
.HSIZE,
|
||||
.HBURST,
|
||||
.HPROT,
|
||||
.HTRANS,
|
||||
.HMASTLOCK,
|
||||
.HREADY,
|
||||
.GPIOPinsIn,
|
||||
.GPIOPinsOut, .GPIOPinsEn,
|
||||
.UARTSin,
|
||||
.UARTSout,
|
||||
.SDCCmdIn,
|
||||
.SDCCmdOut,
|
||||
.SDCCmdOE,
|
||||
.SDCDatIn,
|
||||
.SDCCLK);
|
||||
wallypipelinedsoc dut(.clk, .reset_ext, .HRDATAEXT,.HREADYEXT, .HRESPEXT,.HSELEXT,
|
||||
.HCLK, .HRESETn, .HADDR, .HWDATA, .HWRITE, .HSIZE, .HBURST, .HPROT,
|
||||
.HTRANS, .HMASTLOCK, .HREADY, .GPIOPinsIn, .GPIOPinsOut, .GPIOPinsEn,
|
||||
.UARTSin, .UARTSout, .SDCCmdIn, .SDCCmdOut, .SDCCmdOE, .SDCDatIn, .SDCCLK);
|
||||
|
||||
logic [31:0] InstrW;
|
||||
flopenr #(32) InstrWReg(clk, reset, ~dut.hart.ieu.dp.StallW, dut.hart.ifu.InstrM, InstrW);
|
||||
|
@ -596,13 +596,14 @@ string tests32f[] = '{
|
||||
assign UARTSin = 1;
|
||||
|
||||
dtim #(.BASE(`TIM_BASE), .RANGE(`TIM_RANGE))
|
||||
dtim (.*, .HSELTim(HSELEXT),
|
||||
.HREADTim(HRDATAEXT),
|
||||
.HREADYTim(HREADYEXT),
|
||||
.HRESPTim(HRESPEXT));
|
||||
dtim (.HCLK, .HRESETn, .HADDR, .HWRITE, .HTRANS, .HWDATA, .HSELTim(HSELEXT),
|
||||
.HREADTim(HRDATAEXT), .HREADYTim(HREADYEXT), .HRESPTim(HRESPEXT));
|
||||
|
||||
|
||||
wallypipelinedsocwrapper dut(.*);
|
||||
wallypipelinedsocwrapper dut(.clk, .reset_ext, .HRDATAEXT,.HREADYEXT, .HRESPEXT,.HSELEXT,
|
||||
.HCLK, .HRESETn, .HADDR, .HWDATA, .HWRITE, .HSIZE, .HBURST, .HPROT,
|
||||
.HTRANS, .HMASTLOCK, .HREADY, .GPIOPinsIn, .GPIOPinsOut, .GPIOPinsEn,
|
||||
.UARTSin, .UARTSout, .SDCCmdIn, .SDCCmdOut, .SDCCmdOE, .SDCDatIn, .SDCCLK);
|
||||
|
||||
// Track names of instructions
|
||||
instrTrackerTB it(clk, reset, dut.wallypipelinedsoc.hart.ieu.dp.FlushE,
|
||||
|
@ -91,7 +91,10 @@ module testbench();
|
||||
assign HRESPEXT = 0;
|
||||
assign HRDATAEXT = 0;
|
||||
|
||||
wallypipelinedsoc dut(.*);
|
||||
wallypipelinedsoc dut(.clk, .reset_ext, .HRDATAEXT,.HREADYEXT, .HRESPEXT,.HSELEXT,
|
||||
.HCLK, .HRESETn, .HADDR, .HWDATA, .HWRITE, .HSIZE, .HBURST, .HPROT,
|
||||
.HTRANS, .HMASTLOCK, .HREADY, .GPIOPinsIn, .GPIOPinsOut, .GPIOPinsEn,
|
||||
.UARTSin, .UARTSout, .SDCCmdIn, .SDCCmdOut, .SDCCmdOE, .SDCDatIn, .SDCCLK);
|
||||
flopenr #(32) InstrWReg(clk, reset, ~dut.hart.ieu.dp.StallW, dut.hart.ifu.InstrM, InstrW);
|
||||
// Track names of instructions
|
||||
instrTrackerTBPriv it(clk, reset, dut.hart.ieu.dp.FlushE,
|
||||
|
@ -146,7 +146,10 @@ logic [3:0] dummy;
|
||||
assign HRESPEXT = 0;
|
||||
assign HRDATAEXT = 0;
|
||||
|
||||
wallypipelinedsoc dut(.*);
|
||||
wallypipelinedsoc dut(.clk, .reset_ext, .HRDATAEXT,.HREADYEXT, .HRESPEXT,.HSELEXT,
|
||||
.HCLK, .HRESETn, .HADDR, .HWDATA, .HWRITE, .HSIZE, .HBURST, .HPROT,
|
||||
.HTRANS, .HMASTLOCK, .HREADY, .GPIOPinsIn, .GPIOPinsOut, .GPIOPinsEn,
|
||||
.UARTSin, .UARTSout, .SDCCmdIn, .SDCCmdOut, .SDCCmdOE, .SDCDatIn, .SDCCLK);
|
||||
|
||||
// Track names of instructions
|
||||
instrTrackerTB it(clk, reset, dut.hart.ieu.dp.FlushE,
|
||||
|
Loading…
Reference in New Issue
Block a user