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Updated branch predictor tests/benchmarks.

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This commit is contained in:
Ross Thompson 2021-05-24 11:13:33 -05:00
parent 6f38b7633c
commit 8bf411c640
3 changed files with 14 additions and 9 deletions
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3
testsBP/makefile.inc
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@ -90,4 +90,5 @@ $(TARGET).memfile: $(TARGET)
@echo 'Making memory file' @echo 'Making memory file'
exe2memfile0.pl $< exe2memfile0.pl $<
extractFunctionRadix.sh $<.objdump extractFunctionRadix.sh $<.objdump
cp $(TARGETDIR)/* ../../imperas-riscv-tests/work/rv64BP/ mkdir -p ../../imperas-riscv-tests/work/rv64BP/
cp -f $(TARGETDIR)/* ../../imperas-riscv-tests/work/rv64BP/

3
testsBP/simple/main.c
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@ -1,7 +1,8 @@
#include "header.h" #include "header.h"
int main(){ int main(){
int res = icache_spill_test(); //int res = icache_spill_test();
int res = 1;
if (res < 0) { if (res < 0) {
fail(); fail();
return 0; return 0;

13
wally-pipelined/testbench/testbench-imperas.sv
View File

@ -28,7 +28,6 @@
module testbench(); module testbench();
parameter DEBUG = 0; parameter DEBUG = 0;
parameter TESTSBP = 0;
parameter TESTSPERIPH = 0; // set to 0 for regression parameter TESTSPERIPH = 0; // set to 0 for regression
logic clk; logic clk;
@ -513,8 +512,10 @@ string tests32f[] = '{
initial begin initial begin
if (`XLEN == 64) begin // RV64 if (`XLEN == 64) begin // RV64
if (`TESTSBP) begin if (`TESTSBP) begin
tests = {testsBP64,tests64p}; tests = testsBP64;
end if (TESTSPERIPH) begin // testsbp should not run the other tests. It starts at address 0 rather than
// 0x8000_0000, the next if must remain an else if.
end else if (TESTSPERIPH) begin
tests = tests64periph; tests = tests64periph;
end else begin end else begin
tests = {tests64p,tests64i,tests64periph}; tests = {tests64p,tests64i,tests64periph};
@ -582,9 +583,11 @@ string tests32f[] = '{
if (`XLEN == 32) meminit = 32'hFEDC0123; if (`XLEN == 32) meminit = 32'hFEDC0123;
else meminit = 64'hFEDCBA9876543210; else meminit = 64'hFEDCBA9876543210;
// *** broken because DTIM also drives RAM // *** broken because DTIM also drives RAM
/*for (i=MemStartAddr; i<MemEndAddr; i = i+1) begin if (`TESTSBP) begin
for (i=MemStartAddr; i<MemEndAddr; i = i+1) begin
dut.uncore.dtim.RAM[i] = meminit; dut.uncore.dtim.RAM[i] = meminit;
end*/ end
end
// read test vectors into memory // read test vectors into memory
memfilename = {"../../imperas-riscv-tests/work/", tests[test], ".elf.memfile"}; memfilename = {"../../imperas-riscv-tests/work/", tests[test], ".elf.memfile"};
$readmemh(memfilename, dut.uncore.dtim.RAM); $readmemh(memfilename, dut.uncore.dtim.RAM);